Peter De Schrijver 053b525f6f clk: tegra: pllc and pllxc should use pdiv_map ... The pllc and pllxc code weren't always using the correct pdiv_map to map between the post divider value and the hw p field. This could result in illegal values being programmed in the hw. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-06-11 16:15:22 -07:00
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clk-audio-sync.c
clk-divider.c
clk-periph-gate.c	clk: tegra: Workaround for Tegra114 MSENC problem	2013-04-04 16:10:59 -06:00
clk-periph.c	clk: tegra: Add flags to tegra_clk_periph()	2013-04-04 16:10:56 -06:00
clk-pll-out.c
clk-pll.c	clk: tegra: pllc and pllxc should use pdiv_map	2013-06-11 16:15:22 -07:00
clk-super.c	clk: tegra: Implement locking for super clock	2013-02-12 10:29:12 -07:00
clk-tegra20.c	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
clk-tegra30.c	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
clk-tegra114.c	clk: tegra114: Fix msenc clock register	2013-06-04 23:52:53 -07:00
clk.c	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
clk.h	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
Makefile	clk: tegra: Implement clocks for Tegra114	2013-04-04 17:17:12 -06:00