David Daney 0c3263870f MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.

The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.

[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
        __irq_set_affinity_lock ]

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:06 +02:00
..
2010-02-27 12:53:30 +01:00
2009-09-17 20:07:42 +02:00
2010-10-27 18:03:17 -07:00
2010-02-27 12:53:14 +01:00
2009-07-03 15:45:26 +01:00
2008-12-12 18:12:23 +00:00
2010-02-27 12:53:42 +01:00
2010-08-05 13:26:29 +01:00
2009-12-05 09:10:12 -08:00
2011-01-18 19:30:28 +01:00
2010-02-27 12:53:27 +01:00
2009-07-03 15:45:29 +01:00
2009-12-17 01:57:32 +00:00
2010-10-26 16:52:08 -07:00
2010-12-16 18:11:01 +00:00
2009-06-17 11:06:28 +01:00
2010-10-07 14:08:55 +01:00
2010-08-05 13:26:29 +01:00
2010-08-05 13:26:29 +01:00
2010-06-09 11:12:36 +02:00
2011-01-13 17:32:47 -08:00
2010-04-12 17:26:14 +01:00
2010-02-27 12:53:14 +01:00
2010-02-27 12:53:14 +01:00
2010-10-04 18:33:55 +01:00
2010-02-27 12:53:27 +01:00
2010-10-26 16:52:08 -07:00
2009-07-03 15:45:27 +01:00
2010-02-27 12:53:27 +01:00
2009-11-02 12:00:01 +01:00
2010-02-27 12:53:14 +01:00
2010-02-27 12:53:42 +01:00
2010-08-09 16:48:44 -04:00
2009-06-17 11:06:31 +01:00
2011-03-23 19:47:18 -07:00
2010-02-27 12:53:27 +01:00
2010-04-12 17:26:14 +01:00