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0d854a60b1
Wire the init of a 32bit vcpu by allowing 32bit modes in pstate, and providing sensible defaults out of reset state. This feature is of course conditioned by the presence of 32bit capability on the physical CPU, and is checked by the KVM_CAP_ARM_EL1_32BIT capability. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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.. | ||
arch_timer.h | ||
asm-offsets.h | ||
assembler.h | ||
atomic.h | ||
barrier.h | ||
bitops.h | ||
cache.h | ||
cacheflush.h | ||
cachetype.h | ||
cmpxchg.h | ||
compat.h | ||
compiler.h | ||
cputable.h | ||
cputype.h | ||
debug-monitors.h | ||
device.h | ||
dma-mapping.h | ||
elf.h | ||
esr.h | ||
exception.h | ||
exec.h | ||
fb.h | ||
fpsimd.h | ||
fpsimdmacros.h | ||
futex.h | ||
hardirq.h | ||
hw_breakpoint.h | ||
hwcap.h | ||
io.h | ||
irq.h | ||
irqflags.h | ||
Kbuild | ||
kvm_arm.h | ||
kvm_asm.h | ||
kvm_coproc.h | ||
kvm_emulate.h | ||
kvm_host.h | ||
kvm_mmio.h | ||
kvm_mmu.h | ||
kvm_psci.h | ||
linkage.h | ||
memblock.h | ||
memory.h | ||
mmu_context.h | ||
mmu.h | ||
module.h | ||
page.h | ||
perf_event.h | ||
pgalloc.h | ||
pgtable-2level-hwdef.h | ||
pgtable-2level-types.h | ||
pgtable-3level-hwdef.h | ||
pgtable-3level-types.h | ||
pgtable-hwdef.h | ||
pgtable.h | ||
pmu.h | ||
proc-fns.h | ||
processor.h | ||
prom.h | ||
psci.h | ||
ptrace.h | ||
shmparam.h | ||
sigcontext.h | ||
signal32.h | ||
smp_plat.h | ||
smp.h | ||
sparsemem.h | ||
spinlock_types.h | ||
spinlock.h | ||
stacktrace.h | ||
stat.h | ||
string.h | ||
syscall.h | ||
syscalls.h | ||
system_misc.h | ||
thread_info.h | ||
timex.h | ||
tlb.h | ||
tlbflush.h | ||
traps.h | ||
uaccess.h | ||
ucontext.h | ||
unistd32.h | ||
unistd.h | ||
vdso_datapage.h | ||
vdso.h | ||
virt.h |