Richard Woodruff 0f0d080709 ARM: OMAP: DMTimer: Use posted mode ... This patch adds the use of write posting for the timer. Previously, every write could lock the requestor for almost 3x32KHz cycles. This patch only synchronizes before writes and reads instead of after them and it does it on per register basis. Doing it this way there is some chance to hide some of the sync latency. It also removes some needless reads when non-posted mode is there. With out this fix the read/writes take almost 2% CPU load @500MHz just waiting on tick timer registers. Also define new 34xx only registers. Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>		2008-07-03 12:24:30 +03:00
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clock.c	[ARM] omap: fix omap clk support build errors	2008-05-22 16:38:50 +01:00
common.c
cpu-omap.c
debug-devices.c
debug-leds.c
devices.c
dma.c	ARM: OMAP: DMA: Don't mark channel active in omap_enable_channel_irq	2008-06-05 14:30:15 -07:00
dmtimer.c	ARM: OMAP: DMTimer: Use posted mode	2008-07-03 12:24:30 +03:00
fb.c
gpio.c
i2c.c
Kconfig
mailbox.c	ARM: OMAP: Fix Unbalanced enable for IRQ in omap mailbox	2008-05-09 10:25:03 -07:00
mailbox.h
Makefile
mcbsp.c
mux.c
ocpi.c
sram-fn.S
sram.c
usb.c