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This patch adds ASoC audio DMA support to the Atmel AT91RM9200 CPU. Features:- o Playback/Capture supported. o 16 Bit data size. Signed-off-by: Frank Mandarino <fmandarino@endrelia.com> Signed-off-by: Liam Girdwood <liam.girdwood@wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
/*
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* at91rm9200-pcm.h - ALSA PCM interface for the Atmel AT91RM9200 chip
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*
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* Author: Frank Mandarino <fmandarino@endrelia.com>
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* Endrelia Technologies Inc.
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* Created: Mar 3, 2006
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*
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* Based on pxa2xx-pcm.h by:
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*
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* Author: Nicolas Pitre
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* Created: Nov 30, 2004
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* Copyright: MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Registers and status bits that are required by the PCM driver.
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*/
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struct at91rm9200_ssc_regs {
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void __iomem *cr; /* SSC control */
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void __iomem *ier; /* SSC interrupt enable */
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void __iomem *idr; /* SSC interrupt disable */
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};
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struct at91rm9200_pdc_regs {
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void __iomem *xpr; /* PDC recv/trans pointer */
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void __iomem *xcr; /* PDC recv/trans counter */
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void __iomem *xnpr; /* PDC next recv/trans pointer */
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void __iomem *xncr; /* PDC next recv/trans counter */
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void __iomem *ptcr; /* PDC transfer control */
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};
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struct at91rm9200_ssc_mask {
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u32 ssc_enable; /* SSC recv/trans enable */
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u32 ssc_disable; /* SSC recv/trans disable */
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u32 ssc_endx; /* SSC ENDTX or ENDRX */
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u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */
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u32 pdc_enable; /* PDC recv/trans enable */
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u32 pdc_disable; /* PDC recv/trans disable */
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};
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/*
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* This structure, shared between the PCM driver and the interface,
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* contains all information required by the PCM driver to perform the
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* PDC DMA operation. All fields except dma_intr_handler() are initialized
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* by the interface. The dms_intr_handler() pointer is set by the PCM
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* driver and called by the interface SSC interrupt handler if it is
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* non-NULL.
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*/
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typedef struct {
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char *name; /* stream identifier */
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int pdc_xfer_size; /* PDC counter increment in bytes */
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struct at91rm9200_ssc_regs *ssc; /* SSC register addresses */
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struct at91rm9200_pdc_regs *pdc; /* PDC receive/transmit registers */
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struct at91rm9200_ssc_mask *mask;/* SSC & PDC status bits */
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snd_pcm_substream_t *substream;
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void (*dma_intr_handler)(u32, snd_pcm_substream_t *);
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} at91rm9200_pcm_dma_params_t;
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extern struct snd_soc_cpu_dai at91rm9200_i2s_dai[3];
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extern struct snd_soc_platform at91rm9200_soc_platform;
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/*
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* SSC I/O helpers.
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* E.g., at91_ssc_write(AT91_SSC(1) + AT91_SSC_CR, AT91_SSC_RXEN);
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*/
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#define AT91_SSC(x) (((x)==0) ? AT91_VA_BASE_SSC0 :\
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((x)==1) ? AT91_VA_BASE_SSC1 : ((x)==2) ? AT91_VA_BASE_SSC2 : NULL)
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#define at91_ssc_read(a) ((unsigned long) __raw_readl(a))
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#define at91_ssc_write(a,v) __raw_writel((v),(a))
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