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CPUs implementing LPAE have atomic ldrd/strd instructions, meaning that userspace software can avoid having to use the exclusive variants of these instructions if they wish. This patch advertises the atomicity of these instructions via the hwcaps, so userspace can detect this CPU feature. Reported-by: Vladimir Danushevsky <vladimir.danushevsky@oracle.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
31 lines
912 B
C
31 lines
912 B
C
#ifndef _UAPI__ASMARM_HWCAP_H
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#define _UAPI__ASMARM_HWCAP_H
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/*
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* HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
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*/
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#define HWCAP_SWP (1 << 0)
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#define HWCAP_HALF (1 << 1)
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#define HWCAP_THUMB (1 << 2)
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#define HWCAP_26BIT (1 << 3) /* Play it safe */
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#define HWCAP_FAST_MULT (1 << 4)
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#define HWCAP_FPA (1 << 5)
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#define HWCAP_VFP (1 << 6)
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#define HWCAP_EDSP (1 << 7)
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#define HWCAP_JAVA (1 << 8)
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#define HWCAP_IWMMXT (1 << 9)
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#define HWCAP_CRUNCH (1 << 10)
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#define HWCAP_THUMBEE (1 << 11)
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#define HWCAP_NEON (1 << 12)
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#define HWCAP_VFPv3 (1 << 13)
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#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
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#define HWCAP_TLS (1 << 15)
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#define HWCAP_VFPv4 (1 << 16)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
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#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
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#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
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#define HWCAP_LPAE (1 << 20)
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#endif /* _UAPI__ASMARM_HWCAP_H */
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