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linux/include/dt-bindings/reset
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Chen-Yu Tsai 783ab76ae5 clk: sunxi-ng: Add A80 Display Engine CCU 
With the A80 SoC, Allwinner grouped and moved some subsystem specific
clock controls to a separate address space, and possibly separate
hardware block.

One such subsystem is the display engine. The main clock control unit
now only has 1 set of bus gate, dram gate, module clock, and reset
control for the entire display subsystem. These feed into a secondary
clock control unit, which has controls for each individual module
of the display pipeline. This block is not documented in the user
manual. Allwinner's kernel was used as the reference.

Add support for the display engine clock controls found on the A80.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:38:30 +01:00
..
altr,rst-mgr-a10.h dt-bindings: Add reset manager offsets for Arria10 2015-08-09 21:58:33 -05:00
altr,rst-mgr.h ARM: socfpga: dts: add reset-controller 2014-05-05 22:33:18 -05:00
amlogic,meson8b-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
amlogic,meson-gxbb-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
gxbb-aoclkc.h dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings 2016-08-19 12:49:00 -07:00
hisi,hi6220-resets.h arm64: dts: hi6220: Add media subsystem reset dts 2016-06-29 23:39:08 +02:00
mt2701-resets.h reset: mediatek: Add MT2701 reset controller dt-binding file 2016-08-19 12:47:20 -07:00
mt8135-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
mt8173-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
oxsemi,ox810se.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
oxsemi,ox820.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
pistachio-resets.h reset: img: Add Pistachio reset controller driver 2016-02-05 16:41:20 +01:00
qcom,gcc-apq8084.h clk: qcom: Add APQ8084 Global Clock Controller support 2014-07-11 13:22:00 -07:00
qcom,gcc-ipq806x.h clk: qcom: Add support for NSS/GMAC clocks and resets 2015-05-30 17:04:36 -07:00
qcom,gcc-mdm9615.h dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC 2016-08-15 15:51:18 -07:00
qcom,gcc-msm8660.h clk: qcom: Add support for MSM8660's global clock controller (GCC) 2014-01-16 12:01:05 -08:00
qcom,gcc-msm8916.h dt-bindings: Add #defines for MSM8916 clocks and resets 2015-03-23 16:09:20 -07:00
qcom,gcc-msm8960.h clk: qcom: Fully support apq8064 global clock control 2014-07-11 13:21:22 -07:00
qcom,gcc-msm8974.h clk: qcom: Add support for MSM8974's global clock controller (GCC) 2014-01-16 12:01:04 -08:00
qcom,mmcc-apq8084.h clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support 2014-07-15 16:38:57 -07:00
qcom,mmcc-msm8960.h clk: qcom: Add support for APQ8064 multimedia clocks 2014-07-15 16:39:03 -07:00
qcom,mmcc-msm8974.h clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC) 2014-01-16 12:01:05 -08:00
stih407-resets.h ARM: STi: Add DT defines for co-processor reset lines 2015-11-16 09:23:47 +01:00
stih415-resets.h ARM: STi: DT: Move reset controller constants into common location 2015-08-03 13:13:44 +02:00
stih416-resets.h ARM: STi: DT: Move reset controller constants into common location 2015-08-03 13:13:44 +02:00
sun5i-ccu.h clk: sunxi-ng: Add sun5i CCU driver 2017-01-23 11:45:29 +01:00
sun6i-a31-ccu.h clk: sunxi-ng: Add A31/A31s clocks 2016-08-25 22:31:43 +02:00
sun8i-a23-a33-ccu.h clk: sunxi-ng: Add A33 CCU support 2016-09-10 11:41:19 +02:00
sun8i-h3-ccu.h clk: sunxi-ng: Add H3 clocks 2016-07-08 18:05:12 -07:00
sun8i-v3s-ccu.h clk: sunxi-ng: add support for V3s CCU 2017-01-20 21:39:03 +01:00
sun9i-a80-ccu.h clk: sunxi-ng: Add A80 CCU 2017-01-30 08:37:30 +01:00
sun9i-a80-de.h clk: sunxi-ng: Add A80 Display Engine CCU 2017-01-30 08:38:30 +01:00
sun9i-a80-usb.h clk: sunxi-ng: Add A80 USB CCU 2017-01-30 08:37:51 +01:00
sun50i-a64-ccu.h clk: sunxi-ng: Add A64 clocks 2016-11-03 09:06:18 +01:00
tegra124-car.h clk: tegra: Add DFLL DVCO reset control for Tegra124 2015-07-16 09:32:48 +02:00
tegra186-reset.h dt-bindings: firmware: Add bindings for Tegra BPMP 2016-11-18 14:33:41 +01:00
ti-syscon.h Documentation: dt: reset: Add TI syscon reset binding 2016-06-29 23:39:10 +02:00