John Crispin 15753b6586 MIPS: lantiq: fix bootselect bits on XRX200 SoC
The XRX200 SoC family has a different register layout for reading the boot
selection bits.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4519
2012-11-11 18:47:20 +01:00
..
2012-05-15 17:49:22 +02:00
2012-11-11 18:44:05 +01:00
2012-05-21 14:31:49 +01:00