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There are a number of statements of the form A, B or A, B, C where the numbers A,B,C are not consecutive. However, referencing [1] it is the correct thing to replace these with A-B or A-C as apropriate. [1] http://www.copyrightservice.co.uk/copyright/p03_copyright_notices section 4iii 'Year of publication' Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Simtec Linux Team <linux@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
/* arch/arm/mach-s3c2400/include/mach/map.h
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*
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* Copyright 2003-2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Copyright 2003, Lucas Correia Villa Real
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*
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* S3C2400 - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S3C2400_PA_MEMCTRL (0x14000000)
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#define S3C2400_PA_USBHOST (0x14200000)
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#define S3C2400_PA_IRQ (0x14400000)
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#define S3C2400_PA_DMA (0x14600000)
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#define S3C2400_PA_CLKPWR (0x14800000)
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#define S3C2400_PA_LCD (0x14A00000)
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#define S3C2400_PA_UART (0x15000000)
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#define S3C2400_PA_TIMER (0x15100000)
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#define S3C2400_PA_USBDEV (0x15200140)
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#define S3C2400_PA_WATCHDOG (0x15300000)
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#define S3C2400_PA_IIC (0x15400000)
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#define S3C2400_PA_IIS (0x15508000)
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#define S3C2400_PA_GPIO (0x15600000)
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#define S3C2400_PA_RTC (0x15700040)
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#define S3C2400_PA_ADC (0x15800000)
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#define S3C2400_PA_SPI (0x15900000)
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#define S3C2400_PA_MMC (0x15A00000)
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#define S3C2400_SZ_MMC SZ_1M
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/* physical addresses of all the chip-select areas */
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#define S3C2400_CS0 (0x00000000)
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#define S3C2400_CS1 (0x02000000)
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#define S3C2400_CS2 (0x04000000)
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#define S3C2400_CS3 (0x06000000)
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#define S3C2400_CS4 (0x08000000)
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#define S3C2400_CS5 (0x0A000000)
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#define S3C2400_CS6 (0x0C000000)
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#define S3C2400_CS7 (0x0E000000)
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#define S3C2400_SDRAM_PA (S3C2400_CS6)
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/* Use a single interface for common resources between S3C24XX cpus */
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#define S3C24XX_PA_IRQ S3C2400_PA_IRQ
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#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL
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#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST
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#define S3C24XX_PA_DMA S3C2400_PA_DMA
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#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR
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#define S3C24XX_PA_LCD S3C2400_PA_LCD
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#define S3C24XX_PA_UART S3C2400_PA_UART
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#define S3C24XX_PA_TIMER S3C2400_PA_TIMER
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#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV
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#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG
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#define S3C24XX_PA_IIC S3C2400_PA_IIC
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#define S3C24XX_PA_IIS S3C2400_PA_IIS
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#define S3C24XX_PA_GPIO S3C2400_PA_GPIO
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#define S3C24XX_PA_RTC S3C2400_PA_RTC
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#define S3C24XX_PA_ADC S3C2400_PA_ADC
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#define S3C24XX_PA_SPI S3C2400_PA_SPI
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