Leela Krishna Amudala 17d4caccef clk: exynos5250: register display block gate clocks to common clock framework ... Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi. Register it to common clock framework. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>		2013-04-04 15:51:23 +09:00
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clk-exynos4.c	clk: exynos4: Add support for SoC-specific register save list	2013-04-04 15:51:22 +09:00
clk-exynos5250.c	clk: exynos5250: register display block gate clocks to common clock framework	2013-04-04 15:51:23 +09:00
clk-exynos5440.c	clk: exynos4: Add support for SoC-specific register save list	2013-04-04 15:51:22 +09:00
clk-pll.c	clk: samsung: Remove unimplemented ops for pll	2013-04-04 15:51:09 +09:00
clk-pll.h
clk.c	clk: exynos4: Add support for SoC-specific register save list	2013-04-04 15:51:22 +09:00
clk.h	clk: exynos4: Add support for SoC-specific register save list	2013-04-04 15:51:22 +09:00
Makefile	clk: exynos5440: register clocks using common clock framework	2013-03-25 18:17:05 +09:00