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90303b1023
Patch from Catalin Marinas If the low interrupt latency mode is enabled for the CPU (from ARMv6 onwards), the ldm/stm instructions are no longer atomic. An ldm instruction restoring the sp and pc registers can be interrupted immediately after sp was updated but before the pc. If this happens, the CPU restores the base register to the value before the ldm instruction but if the base register is not sp, the interrupt routine will corrupt the stack and the restarted ldm instruction will load garbage. Note that future ARM cores might always run in the low interrupt latency mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
182 lines
3.9 KiB
C
182 lines
3.9 KiB
C
/*
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* linux/arch/arm/kernel/fiq.c
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*
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* Copyright (C) 1998 Russell King
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* Copyright (C) 1998, 1999 Phil Blundell
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*
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* FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
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*
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* FIQ support re-written by Russell King to be more generic
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*
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* We now properly support a method by which the FIQ handlers can
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* be stacked onto the vector. We still do not support sharing
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* the FIQ vector itself.
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*
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* Operation is as follows:
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* 1. Owner A claims FIQ:
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* - default_fiq relinquishes control.
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* 2. Owner A:
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* - inserts code.
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* - sets any registers,
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* - enables FIQ.
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* 3. Owner B claims FIQ:
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* - if owner A has a relinquish function.
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* - disable FIQs.
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* - saves any registers.
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* - returns zero.
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* 4. Owner B:
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* - inserts code.
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* - sets any registers,
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* - enables FIQ.
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* 5. Owner B releases FIQ:
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* - Owner A is asked to reacquire FIQ:
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* - inserts code.
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* - restores saved registers.
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* - enables FIQ.
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* 6. Goto 3
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <asm/cacheflush.h>
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#include <asm/fiq.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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static unsigned long no_fiq_insn;
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/* Default reacquire function
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* - we always relinquish FIQ control
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* - we always reacquire FIQ control
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*/
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static int fiq_def_op(void *ref, int relinquish)
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{
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if (!relinquish)
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set_fiq_handler(&no_fiq_insn, sizeof(no_fiq_insn));
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return 0;
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}
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static struct fiq_handler default_owner = {
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.name = "default",
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.fiq_op = fiq_def_op,
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};
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static struct fiq_handler *current_fiq = &default_owner;
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int show_fiq_list(struct seq_file *p, void *v)
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{
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if (current_fiq != &default_owner)
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seq_printf(p, "FIQ: %s\n", current_fiq->name);
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return 0;
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}
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void set_fiq_handler(void *start, unsigned int length)
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{
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memcpy((void *)0xffff001c, start, length);
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flush_icache_range(0xffff001c, 0xffff001c + length);
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if (!vectors_high())
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flush_icache_range(0x1c, 0x1c + length);
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}
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/*
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* Taking an interrupt in FIQ mode is death, so both these functions
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* disable irqs for the duration. Note - these functions are almost
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* entirely coded in assembly.
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*/
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void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
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{
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register unsigned long tmp;
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asm volatile (
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"mov ip, sp\n\
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stmfd sp!, {fp, ip, lr, pc}\n\
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sub fp, ip, #4\n\
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mrs %0, cpsr\n\
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msr cpsr_c, %2 @ select FIQ mode\n\
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mov r0, r0\n\
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ldmia %1, {r8 - r14}\n\
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msr cpsr_c, %0 @ return to SVC mode\n\
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mov r0, r0\n\
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ldmfd sp, {fp, sp, pc}"
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: "=&r" (tmp)
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: "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
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}
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void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs)
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{
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register unsigned long tmp;
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asm volatile (
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"mov ip, sp\n\
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stmfd sp!, {fp, ip, lr, pc}\n\
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sub fp, ip, #4\n\
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mrs %0, cpsr\n\
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msr cpsr_c, %2 @ select FIQ mode\n\
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mov r0, r0\n\
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stmia %1, {r8 - r14}\n\
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msr cpsr_c, %0 @ return to SVC mode\n\
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mov r0, r0\n\
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ldmfd sp, {fp, sp, pc}"
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: "=&r" (tmp)
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: "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
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}
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int claim_fiq(struct fiq_handler *f)
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{
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int ret = 0;
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if (current_fiq) {
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ret = -EBUSY;
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if (current_fiq->fiq_op != NULL)
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ret = current_fiq->fiq_op(current_fiq->dev_id, 1);
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}
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if (!ret) {
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f->next = current_fiq;
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current_fiq = f;
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}
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return ret;
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}
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void release_fiq(struct fiq_handler *f)
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{
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if (current_fiq != f) {
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printk(KERN_ERR "%s FIQ trying to release %s FIQ\n",
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f->name, current_fiq->name);
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dump_stack();
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return;
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}
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do
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current_fiq = current_fiq->next;
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while (current_fiq->fiq_op(current_fiq->dev_id, 0));
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}
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void enable_fiq(int fiq)
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{
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enable_irq(fiq + FIQ_START);
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}
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void disable_fiq(int fiq)
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{
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disable_irq(fiq + FIQ_START);
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}
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EXPORT_SYMBOL(set_fiq_handler);
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EXPORT_SYMBOL(set_fiq_regs);
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EXPORT_SYMBOL(get_fiq_regs);
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EXPORT_SYMBOL(claim_fiq);
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EXPORT_SYMBOL(release_fiq);
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EXPORT_SYMBOL(enable_fiq);
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EXPORT_SYMBOL(disable_fiq);
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void __init init_FIQ(void)
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{
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no_fiq_insn = *(unsigned long *)0xffff001c;
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}
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