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1a7e68f2c7
For CIUv1 controllers, we were relying on all calls to the irq_chip functions to be done from the CPU that received the irq, and that they would all be done from interrupt contest. These assumptions do not hold for threaded handlers. We make all the masking actually mask the irq source, and use real raw_spin_locks instead of manually twiddling the Status[IE] bit. Signed-off-by: David Daney <david.daney@cavium.com> |
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.. | ||
executive | ||
.gitignore | ||
cpu.c | ||
csrc-octeon.c | ||
dma-octeon.c | ||
flash_setup.c | ||
Kconfig | ||
Makefile | ||
octeon_3xxx.dts | ||
octeon_68xx.dts | ||
octeon_boot.h | ||
octeon-irq.c | ||
octeon-memcpy.S | ||
octeon-platform.c | ||
Platform | ||
serial.c | ||
setup.c | ||
smp.c |