mirror of
https://github.com/FEX-Emu/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
432 lines
11 KiB
C
432 lines
11 KiB
C
/*
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* Platform dependent support for SGI SN
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
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*/
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#include <linux/irq.h>
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#include <asm/sn/intr.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/arch.h>
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#include "xtalk/xwidgetdev.h"
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#include "pci/pcibus_provider_defs.h"
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#include "pci/pcidev.h"
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#include "pci/pcibr_provider.h"
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/sn_sal.h>
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static void force_interrupt(int irq);
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static void register_intr_pda(struct sn_irq_info *sn_irq_info);
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static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
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extern int sn_force_interrupt_flag;
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extern int sn_ioif_inited;
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struct sn_irq_info **sn_irq;
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static inline uint64_t sn_intr_alloc(nasid_t local_nasid, int local_widget,
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u64 sn_irq_info,
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int req_irq, nasid_t req_nasid,
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int req_slice)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
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(u64) SAL_INTR_ALLOC, (u64) local_nasid,
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(u64) local_widget, (u64) sn_irq_info, (u64) req_irq,
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(u64) req_nasid, (u64) req_slice);
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return ret_stuff.status;
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}
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static inline void sn_intr_free(nasid_t local_nasid, int local_widget,
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struct sn_irq_info *sn_irq_info)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
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(u64) SAL_INTR_FREE, (u64) local_nasid,
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(u64) local_widget, (u64) sn_irq_info->irq_irq,
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(u64) sn_irq_info->irq_cookie, 0, 0);
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}
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static unsigned int sn_startup_irq(unsigned int irq)
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{
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return 0;
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}
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static void sn_shutdown_irq(unsigned int irq)
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{
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}
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static void sn_disable_irq(unsigned int irq)
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{
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}
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static void sn_enable_irq(unsigned int irq)
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{
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}
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static void sn_ack_irq(unsigned int irq)
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{
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uint64_t event_occurred, mask = 0;
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int nasid;
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irq = irq & 0xff;
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nasid = get_nasid();
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event_occurred =
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HUB_L((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED));
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if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
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mask |= (1 << SH_EVENT_OCCURRED_UART_INT_SHFT);
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}
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if (event_occurred & SH_EVENT_OCCURRED_IPI_INT_MASK) {
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mask |= (1 << SH_EVENT_OCCURRED_IPI_INT_SHFT);
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}
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if (event_occurred & SH_EVENT_OCCURRED_II_INT0_MASK) {
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mask |= (1 << SH_EVENT_OCCURRED_II_INT0_SHFT);
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}
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if (event_occurred & SH_EVENT_OCCURRED_II_INT1_MASK) {
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mask |= (1 << SH_EVENT_OCCURRED_II_INT1_SHFT);
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}
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HUB_S((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED_ALIAS),
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mask);
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__set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
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move_irq(irq);
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}
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static void sn_end_irq(unsigned int irq)
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{
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int nasid;
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int ivec;
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uint64_t event_occurred;
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ivec = irq & 0xff;
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if (ivec == SGI_UART_VECTOR) {
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nasid = get_nasid();
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event_occurred = HUB_L((uint64_t *) GLOBAL_MMR_ADDR
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(nasid, SH_EVENT_OCCURRED));
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/* If the UART bit is set here, we may have received an
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* interrupt from the UART that the driver missed. To
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* make sure, we IPI ourselves to force us to look again.
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*/
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if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
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platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
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IA64_IPI_DM_INT, 0);
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}
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}
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__clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
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if (sn_force_interrupt_flag)
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force_interrupt(irq);
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}
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static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
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{
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struct sn_irq_info *sn_irq_info = sn_irq[irq];
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struct sn_irq_info *tmp_sn_irq_info;
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int cpuid, cpuphys;
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nasid_t t_nasid; /* nasid to target */
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int t_slice; /* slice to target */
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/* allocate a temp sn_irq_info struct to get new target info */
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tmp_sn_irq_info = kmalloc(sizeof(*tmp_sn_irq_info), GFP_KERNEL);
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if (!tmp_sn_irq_info)
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return;
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cpuid = first_cpu(mask);
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cpuphys = cpu_physical_id(cpuid);
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t_nasid = cpuid_to_nasid(cpuid);
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t_slice = cpuid_to_slice(cpuid);
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while (sn_irq_info) {
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int status;
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int local_widget;
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uint64_t bridge = (uint64_t) sn_irq_info->irq_bridge;
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nasid_t local_nasid = NASID_GET(bridge);
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if (!bridge)
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break; /* irq is not a device interrupt */
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if (local_nasid & 1)
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local_widget = TIO_SWIN_WIDGETNUM(bridge);
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else
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local_widget = SWIN_WIDGETNUM(bridge);
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/* Free the old PROM sn_irq_info structure */
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sn_intr_free(local_nasid, local_widget, sn_irq_info);
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/* allocate a new PROM sn_irq_info struct */
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status = sn_intr_alloc(local_nasid, local_widget,
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__pa(tmp_sn_irq_info), irq, t_nasid,
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t_slice);
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if (status == 0) {
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/* Update kernels sn_irq_info with new target info */
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unregister_intr_pda(sn_irq_info);
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sn_irq_info->irq_cpuid = cpuid;
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sn_irq_info->irq_nasid = t_nasid;
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sn_irq_info->irq_slice = t_slice;
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sn_irq_info->irq_xtalkaddr =
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tmp_sn_irq_info->irq_xtalkaddr;
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sn_irq_info->irq_cookie = tmp_sn_irq_info->irq_cookie;
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register_intr_pda(sn_irq_info);
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if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type)) {
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pcibr_change_devices_irq(sn_irq_info);
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}
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sn_irq_info = sn_irq_info->irq_next;
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#ifdef CONFIG_SMP
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set_irq_affinity_info((irq & 0xff), cpuphys, 0);
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#endif
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} else {
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break; /* snp_affinity failed the intr_alloc */
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}
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}
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kfree(tmp_sn_irq_info);
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}
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struct hw_interrupt_type irq_type_sn = {
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"SN hub",
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sn_startup_irq,
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sn_shutdown_irq,
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sn_enable_irq,
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sn_disable_irq,
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sn_ack_irq,
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sn_end_irq,
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sn_set_affinity_irq
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};
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unsigned int sn_local_vector_to_irq(u8 vector)
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{
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return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
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}
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void sn_irq_init(void)
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{
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int i;
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irq_desc_t *base_desc = irq_desc;
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for (i = 0; i < NR_IRQS; i++) {
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if (base_desc[i].handler == &no_irq_type) {
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base_desc[i].handler = &irq_type_sn;
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}
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}
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}
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static void register_intr_pda(struct sn_irq_info *sn_irq_info)
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{
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int irq = sn_irq_info->irq_irq;
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int cpu = sn_irq_info->irq_cpuid;
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if (pdacpu(cpu)->sn_last_irq < irq) {
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pdacpu(cpu)->sn_last_irq = irq;
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}
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if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) {
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pdacpu(cpu)->sn_first_irq = irq;
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}
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}
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static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
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{
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int irq = sn_irq_info->irq_irq;
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int cpu = sn_irq_info->irq_cpuid;
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struct sn_irq_info *tmp_irq_info;
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int i, foundmatch;
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if (pdacpu(cpu)->sn_last_irq == irq) {
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foundmatch = 0;
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for (i = pdacpu(cpu)->sn_last_irq - 1; i; i--) {
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tmp_irq_info = sn_irq[i];
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while (tmp_irq_info) {
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if (tmp_irq_info->irq_cpuid == cpu) {
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foundmatch++;
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break;
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}
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tmp_irq_info = tmp_irq_info->irq_next;
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}
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if (foundmatch) {
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break;
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}
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}
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pdacpu(cpu)->sn_last_irq = i;
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}
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if (pdacpu(cpu)->sn_first_irq == irq) {
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foundmatch = 0;
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for (i = pdacpu(cpu)->sn_first_irq + 1; i < NR_IRQS; i++) {
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tmp_irq_info = sn_irq[i];
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while (tmp_irq_info) {
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if (tmp_irq_info->irq_cpuid == cpu) {
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foundmatch++;
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break;
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}
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tmp_irq_info = tmp_irq_info->irq_next;
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}
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if (foundmatch) {
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break;
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}
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}
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pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
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}
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}
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struct sn_irq_info *sn_irq_alloc(nasid_t local_nasid, int local_widget, int irq,
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nasid_t nasid, int slice)
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{
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struct sn_irq_info *sn_irq_info;
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int status;
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sn_irq_info = kmalloc(sizeof(*sn_irq_info), GFP_KERNEL);
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if (sn_irq_info == NULL)
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return NULL;
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memset(sn_irq_info, 0x0, sizeof(*sn_irq_info));
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status =
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sn_intr_alloc(local_nasid, local_widget, __pa(sn_irq_info), irq,
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nasid, slice);
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if (status) {
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kfree(sn_irq_info);
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return NULL;
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} else {
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return sn_irq_info;
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}
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}
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void sn_irq_free(struct sn_irq_info *sn_irq_info)
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{
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uint64_t bridge = (uint64_t) sn_irq_info->irq_bridge;
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nasid_t local_nasid = NASID_GET(bridge);
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int local_widget;
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if (local_nasid & 1) /* tio check */
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local_widget = TIO_SWIN_WIDGETNUM(bridge);
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else
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local_widget = SWIN_WIDGETNUM(bridge);
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sn_intr_free(local_nasid, local_widget, sn_irq_info);
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kfree(sn_irq_info);
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}
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void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
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{
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nasid_t nasid = sn_irq_info->irq_nasid;
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int slice = sn_irq_info->irq_slice;
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int cpu = nasid_slice_to_cpuid(nasid, slice);
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sn_irq_info->irq_cpuid = cpu;
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sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
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/* link it into the sn_irq[irq] list */
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sn_irq_info->irq_next = sn_irq[sn_irq_info->irq_irq];
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sn_irq[sn_irq_info->irq_irq] = sn_irq_info;
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(void)register_intr_pda(sn_irq_info);
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}
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static void force_interrupt(int irq)
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{
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struct sn_irq_info *sn_irq_info;
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if (!sn_ioif_inited)
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return;
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sn_irq_info = sn_irq[irq];
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while (sn_irq_info) {
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if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
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(sn_irq_info->irq_bridge != NULL)) {
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pcibr_force_interrupt(sn_irq_info);
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}
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sn_irq_info = sn_irq_info->irq_next;
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}
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}
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/*
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* Check for lost interrupts. If the PIC int_status reg. says that
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* an interrupt has been sent, but not handled, and the interrupt
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* is not pending in either the cpu irr regs or in the soft irr regs,
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* and the interrupt is not in service, then the interrupt may have
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* been lost. Force an interrupt on that pin. It is possible that
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* the interrupt is in flight, so we may generate a spurious interrupt,
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* but we should never miss a real lost interrupt.
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*/
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static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
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{
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uint64_t regval;
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int irr_reg_num;
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int irr_bit;
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uint64_t irr_reg;
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struct pcidev_info *pcidev_info;
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struct pcibus_info *pcibus_info;
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pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
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if (!pcidev_info)
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return;
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pcibus_info =
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(struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
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pdi_pcibus_info;
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regval = pcireg_intr_status_get(pcibus_info);
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irr_reg_num = irq_to_vector(irq) / 64;
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irr_bit = irq_to_vector(irq) % 64;
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switch (irr_reg_num) {
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case 0:
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irr_reg = ia64_getreg(_IA64_REG_CR_IRR0);
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break;
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case 1:
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irr_reg = ia64_getreg(_IA64_REG_CR_IRR1);
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break;
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case 2:
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irr_reg = ia64_getreg(_IA64_REG_CR_IRR2);
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break;
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case 3:
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irr_reg = ia64_getreg(_IA64_REG_CR_IRR3);
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break;
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}
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if (!test_bit(irr_bit, &irr_reg)) {
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if (!test_bit(irq, pda->sn_soft_irr)) {
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if (!test_bit(irq, pda->sn_in_service_ivecs)) {
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regval &= 0xff;
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if (sn_irq_info->irq_int_bit & regval &
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sn_irq_info->irq_last_intr) {
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regval &=
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~(sn_irq_info->
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irq_int_bit & regval);
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pcibr_force_interrupt(sn_irq_info);
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}
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}
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}
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}
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sn_irq_info->irq_last_intr = regval;
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}
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void sn_lb_int_war_check(void)
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{
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int i;
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if (!sn_ioif_inited || pda->sn_first_irq == 0)
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return;
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for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
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struct sn_irq_info *sn_irq_info = sn_irq[i];
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while (sn_irq_info) {
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/* Only call for PCI bridges that are fully initialized. */
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if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
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(sn_irq_info->irq_bridge != NULL)) {
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sn_check_intr(i, sn_irq_info);
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}
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sn_irq_info = sn_irq_info->irq_next;
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}
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}
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}
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