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Context switches and TLB flushes can change individual bits of CR4. CR4 reads take several cycles, so store a shadow copy of CR4 in a per-cpu variable. To avoid wasting a cache line, I added the CR4 shadow to cpu_tlbstate, which is already touched in switch_mm. The heaviest users of the cr4 shadow will be switch_mm and __switch_to_xtra, and __switch_to_xtra is called shortly after switch_mm during context switch, so the cacheline is likely to be hot. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Kees Cook <keescook@chromium.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Vince Weaver <vince@deater.net> Cc: "hillf.zj" <hillf.zj@alibaba-inc.com> Cc: Valdis Kletnieks <Valdis.Kletnieks@vt.edu> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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.. | ||
kmemcheck | ||
amdtopology.c | ||
dump_pagetables.c | ||
extable.c | ||
fault.c | ||
gup.c | ||
highmem_32.c | ||
hugetlbpage.c | ||
init_32.c | ||
init_64.c | ||
init.c | ||
iomap_32.c | ||
ioremap.c | ||
kmmio.c | ||
Makefile | ||
memtest.c | ||
mm_internal.h | ||
mmap.c | ||
mmio-mod.c | ||
mpx.c | ||
numa_32.c | ||
numa_64.c | ||
numa_emulation.c | ||
numa_internal.h | ||
numa.c | ||
pageattr-test.c | ||
pageattr.c | ||
pat_internal.h | ||
pat_rbtree.c | ||
pat.c | ||
pf_in.c | ||
pf_in.h | ||
pgtable_32.c | ||
pgtable.c | ||
physaddr.c | ||
physaddr.h | ||
setup_nx.c | ||
srat.c | ||
testmmiotrace.c | ||
tlb.c |