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6d110da8c3
Allow ptrace to set dabr in the thread structure for both 32 and 64 bits, though only 64 bits actually uses that field, it's actually defined in both. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
676 lines
16 KiB
C
676 lines
16 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Derived from "arch/m68k/kernel/ptrace.c"
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* Copyright (C) 1994 by Hamish Macdonald
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* Taken from linux/kernel/ptrace.c and modified for M680x0.
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* linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
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*
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* Modified by Cort Dougan (cort@hq.fsmlabs.com)
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* and Paul Mackerras (paulus@samba.org).
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file README.legal in the main directory of
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* this archive for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/user.h>
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#include <linux/security.h>
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#include <linux/signal.h>
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#include <linux/seccomp.h>
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#include <linux/audit.h>
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#ifdef CONFIG_PPC32
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#include <linux/module.h>
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#endif
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#include <asm/uaccess.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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/*
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* does not yet catch signals sent when the child dies.
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* in exit.c or in signal.c.
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*/
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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#define MSR_DEBUGCHANGE 0
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#else
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#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
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#endif
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/*
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* Max register writeable via put_reg
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*/
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#ifdef CONFIG_PPC32
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#define PT_MAX_PUT_REG PT_MQ
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#else
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#define PT_MAX_PUT_REG PT_CCR
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#endif
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/*
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* Get contents of register REGNO in task TASK.
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*/
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unsigned long ptrace_get_reg(struct task_struct *task, int regno)
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{
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unsigned long tmp = 0;
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if (task->thread.regs == NULL)
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return -EIO;
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if (regno == PT_MSR) {
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tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
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return tmp | task->thread.fpexc_mode;
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}
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if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
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return ((unsigned long *)task->thread.regs)[regno];
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return -EIO;
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}
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/*
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* Write contents of register REGNO in task TASK.
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*/
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int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
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{
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if (task->thread.regs == NULL)
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return -EIO;
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if (regno <= PT_MAX_PUT_REG || regno == PT_TRAP) {
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if (regno == PT_MSR)
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data = (data & MSR_DEBUGCHANGE)
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| (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
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/* We prevent mucking around with the reserved area of trap
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* which are used internally by the kernel
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*/
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if (regno == PT_TRAP)
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data &= 0xfff0;
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((unsigned long *)task->thread.regs)[regno] = data;
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return 0;
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}
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return -EIO;
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}
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static int get_fpregs(void __user *data, struct task_struct *task,
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int has_fpscr)
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{
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unsigned int count = has_fpscr ? 33 : 32;
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if (copy_to_user(data, task->thread.fpr, count * sizeof(double)))
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return -EFAULT;
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return 0;
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}
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static int set_fpregs(void __user *data, struct task_struct *task,
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int has_fpscr)
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{
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unsigned int count = has_fpscr ? 33 : 32;
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if (copy_from_user(task->thread.fpr, data, count * sizeof(double)))
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return -EFAULT;
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return 0;
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}
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#ifdef CONFIG_ALTIVEC
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/*
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* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
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* The transfer totals 34 quadword. Quadwords 0-31 contain the
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* corresponding vector registers. Quadword 32 contains the vscr as the
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* last word (offset 12) within that quadword. Quadword 33 contains the
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* vrsave as the first word (offset 0) within the quadword.
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*
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* This definition of the VMX state is compatible with the current PPC32
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* ptrace interface. This allows signal handling and ptrace to use the
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* same structures. This also simplifies the implementation of a bi-arch
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* (combined (32- and 64-bit) gdb.
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*/
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/*
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* Get contents of AltiVec register state in task TASK
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*/
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static int get_vrregs(unsigned long __user *data, struct task_struct *task)
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{
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unsigned long regsize;
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/* copy AltiVec registers VR[0] .. VR[31] */
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regsize = 32 * sizeof(vector128);
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if (copy_to_user(data, task->thread.vr, regsize))
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return -EFAULT;
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data += (regsize / sizeof(unsigned long));
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/* copy VSCR */
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regsize = 1 * sizeof(vector128);
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if (copy_to_user(data, &task->thread.vscr, regsize))
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return -EFAULT;
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data += (regsize / sizeof(unsigned long));
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/* copy VRSAVE */
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if (put_user(task->thread.vrsave, (u32 __user *)data))
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return -EFAULT;
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return 0;
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}
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/*
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* Write contents of AltiVec register state into task TASK.
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*/
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static int set_vrregs(struct task_struct *task, unsigned long __user *data)
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{
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unsigned long regsize;
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/* copy AltiVec registers VR[0] .. VR[31] */
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regsize = 32 * sizeof(vector128);
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if (copy_from_user(task->thread.vr, data, regsize))
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return -EFAULT;
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data += (regsize / sizeof(unsigned long));
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/* copy VSCR */
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regsize = 1 * sizeof(vector128);
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if (copy_from_user(&task->thread.vscr, data, regsize))
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return -EFAULT;
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data += (regsize / sizeof(unsigned long));
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/* copy VRSAVE */
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if (get_user(task->thread.vrsave, (u32 __user *)data))
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return -EFAULT;
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return 0;
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}
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_SPE
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/*
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* For get_evrregs/set_evrregs functions 'data' has the following layout:
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*
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* struct {
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* u32 evr[32];
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* u64 acc;
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* u32 spefscr;
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* }
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*/
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/*
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* Get contents of SPE register state in task TASK.
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*/
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static int get_evrregs(unsigned long *data, struct task_struct *task)
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{
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int i;
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if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__put_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__put_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__put_user64(task->thread.acc, (unsigned long long *)data))
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return -EFAULT;
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return 0;
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}
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/*
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* Write contents of SPE register state into task TASK.
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*/
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static int set_evrregs(struct task_struct *task, unsigned long *data)
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{
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int i;
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if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__get_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__get_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__get_user64(task->thread.acc, (unsigned long long*)data))
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return -EFAULT;
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return 0;
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}
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#endif /* CONFIG_SPE */
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static void set_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
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regs->msr |= MSR_DE;
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#else
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regs->msr |= MSR_SE;
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#endif
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}
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set_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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static void clear_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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task->thread.dbcr0 = 0;
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regs->msr &= ~MSR_DE;
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#else
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regs->msr &= ~MSR_SE;
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#endif
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}
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clear_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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unsigned long data)
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{
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/* We only support one DABR and no IABRS at the moment */
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if (addr > 0)
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return -EINVAL;
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/* The bottom 3 bits are flags */
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if ((data & ~0x7UL) >= TASK_SIZE)
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return -EIO;
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/* Ensure translation is on */
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if (data && !(data & DABR_TRANSLATION))
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return -EIO;
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task->thread.dabr = data;
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return 0;
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}
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/*
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* Called by kernel/ptrace.c when detaching..
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*
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* Make sure single step bits etc are not set.
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*/
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void ptrace_disable(struct task_struct *child)
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{
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/* make sure the single step bit is not set. */
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clear_single_step(child);
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}
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/*
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* Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
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* we mark them as obsolete now, they will be removed in a future version
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*/
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static long arch_ptrace_old(struct task_struct *child, long request, long addr,
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long data)
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{
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int ret = -EPERM;
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switch(request) {
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case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
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int i;
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unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
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unsigned long __user *tmp = (unsigned long __user *)addr;
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for (i = 0; i < 32; i++) {
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ret = put_user(*reg, tmp);
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if (ret)
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break;
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reg++;
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tmp++;
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}
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break;
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}
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case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
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int i;
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unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
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unsigned long __user *tmp = (unsigned long __user *)addr;
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for (i = 0; i < 32; i++) {
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ret = get_user(*reg, tmp);
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if (ret)
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break;
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reg++;
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tmp++;
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}
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break;
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}
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case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
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flush_fp_to_thread(child);
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ret = get_fpregs((void __user *)addr, child, 0);
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break;
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}
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case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */
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flush_fp_to_thread(child);
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ret = set_fpregs((void __user *)addr, child, 0);
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break;
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}
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}
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return ret;
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}
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long arch_ptrace(struct task_struct *child, long request, long addr, long data)
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{
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int ret = -EPERM;
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switch (request) {
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/* when I and D space are separate, these will need to be fixed. */
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case PTRACE_PEEKTEXT: /* read word at location addr. */
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case PTRACE_PEEKDATA: {
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unsigned long tmp;
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int copied;
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copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
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ret = -EIO;
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if (copied != sizeof(tmp))
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break;
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ret = put_user(tmp,(unsigned long __user *) data);
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break;
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}
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/* read the word at location addr in the USER area. */
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case PTRACE_PEEKUSR: {
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unsigned long index, tmp;
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ret = -EIO;
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/* convert to index and check */
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#ifdef CONFIG_PPC32
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index = (unsigned long) addr >> 2;
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if ((addr & 3) || (index > PT_FPSCR)
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|| (child->thread.regs == NULL))
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#else
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index = (unsigned long) addr >> 3;
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if ((addr & 7) || (index > PT_FPSCR))
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#endif
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break;
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CHECK_FULL_REGS(child->thread.regs);
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if (index < PT_FPR0) {
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tmp = ptrace_get_reg(child, (int) index);
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} else {
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flush_fp_to_thread(child);
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tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
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}
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ret = put_user(tmp,(unsigned long __user *) data);
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break;
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}
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/* If I and D space are separate, this will have to be fixed. */
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case PTRACE_POKETEXT: /* write the word at location addr. */
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case PTRACE_POKEDATA:
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ret = 0;
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if (access_process_vm(child, addr, &data, sizeof(data), 1)
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== sizeof(data))
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break;
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ret = -EIO;
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break;
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/* write the word at location addr in the USER area */
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case PTRACE_POKEUSR: {
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unsigned long index;
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ret = -EIO;
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/* convert to index and check */
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#ifdef CONFIG_PPC32
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index = (unsigned long) addr >> 2;
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if ((addr & 3) || (index > PT_FPSCR)
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|| (child->thread.regs == NULL))
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#else
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index = (unsigned long) addr >> 3;
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if ((addr & 7) || (index > PT_FPSCR))
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#endif
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break;
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CHECK_FULL_REGS(child->thread.regs);
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if (index < PT_FPR0) {
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ret = ptrace_put_reg(child, index, data);
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} else {
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flush_fp_to_thread(child);
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((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
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ret = 0;
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}
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break;
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}
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case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
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case PTRACE_CONT: { /* restart after signal. */
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ret = -EIO;
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if (!valid_signal(data))
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break;
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if (request == PTRACE_SYSCALL)
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set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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else
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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child->exit_code = data;
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/* make sure the single step bit is not set. */
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clear_single_step(child);
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wake_up_process(child);
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ret = 0;
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break;
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}
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/*
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* make the child exit. Best I can do is send it a sigkill.
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* perhaps it should be put in the status that it wants to
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* exit.
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*/
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case PTRACE_KILL: {
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ret = 0;
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if (child->exit_state == EXIT_ZOMBIE) /* already dead */
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break;
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child->exit_code = SIGKILL;
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/* make sure the single step bit is not set. */
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clear_single_step(child);
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wake_up_process(child);
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break;
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}
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case PTRACE_SINGLESTEP: { /* set the trap flag. */
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ret = -EIO;
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if (!valid_signal(data))
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break;
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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set_single_step(child);
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child->exit_code = data;
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/* give it a chance to run. */
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wake_up_process(child);
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ret = 0;
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break;
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}
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case PTRACE_GET_DEBUGREG: {
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ret = -EINVAL;
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/* We only support one DABR and no IABRS at the moment */
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if (addr > 0)
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break;
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ret = put_user(child->thread.dabr,
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(unsigned long __user *)data);
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break;
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}
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case PTRACE_SET_DEBUGREG:
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ret = ptrace_set_debugreg(child, addr, data);
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break;
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case PTRACE_DETACH:
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ret = ptrace_detach(child, data);
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break;
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#ifdef CONFIG_PPC64
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case PTRACE_GETREGS64:
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#endif
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case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
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int ui;
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if (!access_ok(VERIFY_WRITE, (void __user *)data,
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sizeof(struct pt_regs))) {
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ret = -EIO;
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break;
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}
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ret = 0;
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for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
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ret |= __put_user(ptrace_get_reg(child, ui),
|
|
(unsigned long __user *) data);
|
|
data += sizeof(long);
|
|
}
|
|
break;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC64
|
|
case PTRACE_SETREGS64:
|
|
#endif
|
|
case PTRACE_SETREGS: { /* Set all gp regs in the child. */
|
|
unsigned long tmp;
|
|
int ui;
|
|
if (!access_ok(VERIFY_READ, (void __user *)data,
|
|
sizeof(struct pt_regs))) {
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
ret = 0;
|
|
for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
|
|
ret = __get_user(tmp, (unsigned long __user *) data);
|
|
if (ret)
|
|
break;
|
|
ptrace_put_reg(child, ui, tmp);
|
|
data += sizeof(long);
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */
|
|
flush_fp_to_thread(child);
|
|
ret = get_fpregs((void __user *)data, child, 1);
|
|
break;
|
|
}
|
|
|
|
case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */
|
|
flush_fp_to_thread(child);
|
|
ret = set_fpregs((void __user *)data, child, 1);
|
|
break;
|
|
}
|
|
|
|
#ifdef CONFIG_ALTIVEC
|
|
case PTRACE_GETVRREGS:
|
|
/* Get the child altivec register state. */
|
|
flush_altivec_to_thread(child);
|
|
ret = get_vrregs((unsigned long __user *)data, child);
|
|
break;
|
|
|
|
case PTRACE_SETVRREGS:
|
|
/* Set the child altivec register state. */
|
|
flush_altivec_to_thread(child);
|
|
ret = set_vrregs(child, (unsigned long __user *)data);
|
|
break;
|
|
#endif
|
|
#ifdef CONFIG_SPE
|
|
case PTRACE_GETEVRREGS:
|
|
/* Get the child spe register state. */
|
|
if (child->thread.regs->msr & MSR_SPE)
|
|
giveup_spe(child);
|
|
ret = get_evrregs((unsigned long __user *)data, child);
|
|
break;
|
|
|
|
case PTRACE_SETEVRREGS:
|
|
/* Set the child spe register state. */
|
|
/* this is to clear the MSR_SPE bit to force a reload
|
|
* of register state from memory */
|
|
if (child->thread.regs->msr & MSR_SPE)
|
|
giveup_spe(child);
|
|
ret = set_evrregs(child, (unsigned long __user *)data);
|
|
break;
|
|
#endif
|
|
|
|
/* Old reverse args ptrace callss */
|
|
case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
|
|
case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
|
|
case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
|
|
case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
|
|
ret = arch_ptrace_old(child, request, addr, data);
|
|
break;
|
|
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void do_syscall_trace(void)
|
|
{
|
|
/* the 0x80 provides a way for the tracing parent to distinguish
|
|
between a syscall stop and SIGTRAP delivery */
|
|
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
|
|
? 0x80 : 0));
|
|
|
|
/*
|
|
* this isn't the same as continuing with a signal, but it will do
|
|
* for normal use. strace only continues with a signal if the
|
|
* stopping signal is not SIGTRAP. -brl
|
|
*/
|
|
if (current->exit_code) {
|
|
send_sig(current->exit_code, current, 1);
|
|
current->exit_code = 0;
|
|
}
|
|
}
|
|
|
|
void do_syscall_trace_enter(struct pt_regs *regs)
|
|
{
|
|
secure_computing(regs->gpr[0]);
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE)
|
|
&& (current->ptrace & PT_PTRACED))
|
|
do_syscall_trace();
|
|
|
|
if (unlikely(current->audit_context)) {
|
|
#ifdef CONFIG_PPC64
|
|
if (!test_thread_flag(TIF_32BIT))
|
|
audit_syscall_entry(AUDIT_ARCH_PPC64,
|
|
regs->gpr[0],
|
|
regs->gpr[3], regs->gpr[4],
|
|
regs->gpr[5], regs->gpr[6]);
|
|
else
|
|
#endif
|
|
audit_syscall_entry(AUDIT_ARCH_PPC,
|
|
regs->gpr[0],
|
|
regs->gpr[3] & 0xffffffff,
|
|
regs->gpr[4] & 0xffffffff,
|
|
regs->gpr[5] & 0xffffffff,
|
|
regs->gpr[6] & 0xffffffff);
|
|
}
|
|
}
|
|
|
|
void do_syscall_trace_leave(struct pt_regs *regs)
|
|
{
|
|
if (unlikely(current->audit_context))
|
|
audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
|
|
regs->result);
|
|
|
|
if ((test_thread_flag(TIF_SYSCALL_TRACE)
|
|
|| test_thread_flag(TIF_SINGLESTEP))
|
|
&& (current->ptrace & PT_PTRACED))
|
|
do_syscall_trace();
|
|
}
|