Ralf Baechle e7958bb90d MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2006-01-10 13:39:06 +00:00

..

c-r3k.c

Cleanup the mess in cpu_cache_init.

2005-10-29 19:32:32 +01:00

c-r4k.c

MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.

2006-01-10 13:39:06 +00:00

c-sb1.c

Don't copy SB1 cache error handler to uncached memory.

2005-10-29 19:32:34 +01:00

c-tx39.c

Cleanup the mess in cpu_cache_init.

2005-10-29 19:32:32 +01:00

cache.c

Fix zero length sys_cacheflush

2005-10-29 19:32:44 +01:00

cerr-sb1.c

SB1 cache exception handling.

2005-10-29 19:32:48 +01:00

cex-gen.S

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cex-sb1.S

SB1 cache exception handling.

2005-10-29 19:32:48 +01:00

dma-coherent.c

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dma-ip27.c

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dma-ip32.c

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dma-noncoherent.c

Don't set up a sg dma address if we have no page address for some reason.

2005-10-29 19:32:17 +01:00

extable.c

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fault.c

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highmem.c

Define kmap_atomic_pfn() for MIPS.

2005-10-29 19:31:42 +01:00

init.c

[PATCH] mips: setup_zero_pages count 1

2005-12-12 08:57:43 -08:00

ioremap.c

[PATCH] mm: init_mm without ptlock

2005-10-29 21:40:40 -07:00

Makefile

Fixup a few lose ends in explicit support for MIPS R1/R2.

2005-10-29 19:32:37 +01:00

pg-r4k.c

Add/Fix missing bit of R4600 hit cacheop workaround.

2005-10-29 19:32:18 +01:00

pg-sb1.c

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pgtable-32.c

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pgtable-64.c

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pgtable.c

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sc-ip22.c

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sc-r5k.c

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sc-rm7k.c

Use macros for the RM7k cp0.config bits instead of magic numbers.

2005-10-29 19:31:28 +01:00

tlb-andes.c

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tlb-r3k.c

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tlb-r4k.c

Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.

2005-10-29 19:31:37 +01:00

tlb-r8k.c

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tlbex-fault.S

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tlbex.c

Add support for SB1A CPU.

2005-10-29 19:32:46 +01:00