Paul Burton e875bd66df irqchip/mips-gic: Fix local interrupts ... Since the device hierarchy domain was added by commit c98c1822ee ("irqchip/mips-gic: Add device hierarchy domain"), GIC local interrupts have been broken. Users attempting to setup a per-cpu local IRQ, for example the GIC timer clock events code in drivers/clocksource/mips-gic-timer.c, the setup_percpu_irq function would refuse with -EINVAL because the GIC irqchip driver never called irq_set_percpu_devid so the IRQ_PER_CPU_DEVID flag was never set for the IRQ. This happens because irq_set_percpu_devid was being called from the gic_irq_domain_map function which is no longer called. Doing only that runs into further problems because gic_dev_domain_alloc set the struct irq_chip for all interrupts, local or shared, to gic_level_irq_controller despite that only being suitable for shared interrupts. The typical outcome of this is that gic_level_irq_controller callback functions are called for local interrupts, and then hwirq number calculations overflow & the driver ends up attempting to access some invalid register with an address calculated from an invalid hwirq number. Best case scenario is that this then leads to a bus error. This is fixed by abstracting the setup of the hwirq & chip to a new function gic_setup_dev_chip which is used by both the root GIC IRQ domain & the device domain. Finally, decoding local interrupts failed because gic_dev_domain_alloc only called irq_domain_alloc_irqs_parent for shared interrupts. Local ones were therefore never associated with hwirqs in the root GIC IRQ domain and the virq in gic_handle_local_int would always be 0. This is fixed by calling irq_domain_alloc_irqs_parent unconditionally & having gic_irq_domain_alloc handle both local & shared interrupts, which is easy due to the aforementioned abstraction of chip setup into gic_setup_dev_chip. This fixes use of the MIPS GIC timer for clock events, which has been broken since c98c1822ee ("irqchip/mips-gic: Add device hierarchy domain") but hadn't been noticed due to a silent fallback to the MIPS coprocessor 0 count/compare clock events device. Fixes: c98c1822ee ("irqchip/mips-gic: Add device hierarchy domain") Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Qais Yousef <qsyousef@gmail.com> Cc: stable@vger.kernel.org Cc: Marc Zyngier <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/20160913165335.31389-1-paul.burton@imgtec.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2016-09-20 23:20:02 +02:00
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alphascale_asm9260-icoll.h
exynos-combiner.c
irq-alpine-msi.c
irq-armada-370-xp.c
irq-aspeed-vic.c
irq-ath79-cpu.c
irq-ath79-misc.c
irq-atmel-aic5.c
irq-atmel-aic-common.c
irq-atmel-aic-common.h
irq-atmel-aic.c
irq-bcm2835.c
irq-bcm2836.c
irq-bcm6345-l1.c
irq-bcm7038-l1.c
irq-bcm7120-l2.c
irq-brcmstb-l2.c
irq-clps711x.c
irq-crossbar.c
irq-digicolor.c
irq-dw-apb-ictl.c
irq-eznps.c
irq-gic-common.c
irq-gic-common.h
irq-gic-pm.c
irq-gic-realview.c
irq-gic-v2m.c
irq-gic-v3-its-pci-msi.c
irq-gic-v3-its-platform-msi.c
irq-gic-v3-its.c
irq-gic-v3.c
irq-gic.c
irq-hip04.c
irq-i8259.c
irq-imgpdc.c
irq-imx-gpcv2.c
irq-ingenic.c
irq-keystone.c
irq-lpc32xx.c
irq-ls-scfg-msi.c
irq-mbigen.c
irq-metag-ext.c
irq-metag.c
irq-mips-cpu.c
irq-mips-gic.c
irq-mmp.c
irq-moxart.c
irq-mtk-sysirq.c
irq-mvebu-odmi.c
irq-mxs.c
irq-nvic.c
irq-omap-intc.c
irq-or1k-pic.c
irq-orion.c
irq-partition-percpu.c
irq-pic32-evic.c
irq-renesas-h8s.c
irq-renesas-h8300h.c
irq-renesas-intc-irqpin.c
irq-renesas-irqc.c
irq-s3c24xx.c
irq-sa11x0.c
irq-sirfsoc.c
irq-st.c
irq-sun4i.c
irq-sunxi-nmi.c
irq-tango.c
irq-tb10x.c
irq-tegra.c
irq-ts4800.c
irq-versatile-fpga.c
irq-vf610-mscm-ir.c
irq-vic.c
irq-vt8500.c
irq-xtensa-mx.c
irq-xtensa-pic.c
irq-zevio.c
irqchip.c
Kconfig
Makefile
spear-shirq.c