Sergei Shtylyov 24a0145389 pata_sl82c105: wrong assumptions about compatible PIO modes
Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.

Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-09 17:39:38 -05:00
..
2007-02-09 17:39:34 -05:00
2007-02-09 17:39:31 -05:00
2006-08-10 07:31:37 -04:00