Paul Walmsley 25c9ded6ed clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL ... Add clock functions to initialize, enable, and disable the FCPU clock shapers, based on the FCPU voltage rail state. These will be used by the DFLL clocksource driver code. This version of the patch contains a fix for a problem noticed by Andrew Chew <achew@nvidia.com>, where some of the FINETRIM_R bitfields were incorrectly defined. Based on code originally written by Aleksandr Frid <afrid@nvidia.com>. Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> Cc: Andrew Chew <achew@nvidia.com> Reviewed-by: Andrew Chew <achew@nvidia.com> Cc: Matthew Longnecker <mlongnecker@nvidia.com> Cc: Aleksandr Frid <afrid@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-06-18 11:28:36 -07:00
..
clk-audio-sync.c
clk-divider.c
clk-periph-gate.c	clk: tegra: Workaround for Tegra114 MSENC problem	2013-04-04 16:10:59 -06:00
clk-periph.c	clk: tegra: Add flags to tegra_clk_periph()	2013-04-04 16:10:56 -06:00
clk-pll-out.c
clk-pll.c	clk: tegra: Use override bits when needed	2013-06-11 18:00:32 -07:00
clk-super.c	clk: tegra: Implement locking for super clock	2013-02-12 10:29:12 -07:00
clk-tegra20.c	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
clk-tegra30.c	clk: tegra: override bits for Tegra30 PLLM	2013-06-11 18:00:23 -07:00
clk-tegra114.c	clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL	2013-06-18 11:28:36 -07:00
clk.c	clk: tegra: Use common of_clk_init function	2013-05-31 12:57:25 -07:00
clk.h	clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL	2013-06-18 11:28:36 -07:00
Makefile	clk: tegra: Implement clocks for Tegra114	2013-04-04 17:17:12 -06:00