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80730555af
Fix a really old buglet in AMD Au1xx0 restart code: instead of modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached) before flushing the caches and resetting a board, it only sets bit 1 of that reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it up (which is also its default value for Au1xx0). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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common | ||
csb250 | ||
db1x00 | ||
hydrogen3 | ||
mtx-1 | ||
pb1000 | ||
pb1100 | ||
pb1200 | ||
pb1500 | ||
pb1550 | ||
xxs1500 |