mirror of
https://github.com/FEX-Emu/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
319 lines
8.0 KiB
C
319 lines
8.0 KiB
C
/*
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* Linux/PA-RISC Project (http://www.parisc-linux.org/)
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*
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* Floating-point emulation code
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* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* BEGIN_DESC
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*
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* File:
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* @(#) pa/spmath/fcnvuf.c $Revision: 1.1 $
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*
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* Purpose:
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* Fixed point to Floating-point Converts
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*
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* External Interfaces:
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* dbl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
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* dbl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
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* sgl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
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* sgl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
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*
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* Internal Interfaces:
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*
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* Theory:
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* <<please update with a overview of the operation of this file>>
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*
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* END_DESC
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*/
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#include "float.h"
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#include "sgl_float.h"
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#include "dbl_float.h"
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#include "cnv_float.h"
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/************************************************************************
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* Fixed point to Floating-point Converts *
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************************************************************************/
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/*
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* Convert Single Unsigned Fixed to Single Floating-point format
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*/
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int
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sgl_to_sgl_fcnvuf(
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unsigned int *srcptr,
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unsigned int *nullptr,
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sgl_floating_point *dstptr,
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unsigned int *status)
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{
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register unsigned int src, result = 0;
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register int dst_exponent;
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src = *srcptr;
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/* Check for zero */
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if (src == 0) {
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Sgl_setzero(result);
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(src,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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src <<= dst_exponent+1;
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Sgl_set_mantissa(result, src >> SGL_EXP_LENGTH);
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Sgl_set_exponent(result, 30+SGL_BIAS - dst_exponent);
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/* check for inexact */
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if (Suint_isinexact_to_sgl(src)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Sgl_increment(result);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Sgl_roundnearest_from_suint(src,result);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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*dstptr = result;
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Single Unsigned Fixed to Double Floating-point
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*/
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int
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sgl_to_dbl_fcnvuf(
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unsigned int *srcptr,
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unsigned int *nullptr,
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dbl_floating_point *dstptr,
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unsigned int *status)
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{
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register int dst_exponent;
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register unsigned int src, resultp1 = 0, resultp2 = 0;
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src = *srcptr;
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/* Check for zero */
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if (src == 0) {
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Dbl_setzero(resultp1,resultp2);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(src,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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src <<= dst_exponent+1;
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Dbl_set_mantissap1(resultp1, src >> DBL_EXP_LENGTH);
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Dbl_set_mantissap2(resultp2, src << (32-DBL_EXP_LENGTH));
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Dbl_set_exponent(resultp1, (30+DBL_BIAS) - dst_exponent);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Double Unsigned Fixed to Single Floating-point
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*/
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int
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dbl_to_sgl_fcnvuf(
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dbl_unsigned *srcptr,
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unsigned int *nullptr,
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sgl_floating_point *dstptr,
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unsigned int *status)
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{
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int dst_exponent;
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unsigned int srcp1, srcp2, result = 0;
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Duint_copyfromptr(srcptr,srcp1,srcp2);
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/* Check for zero */
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if (srcp1 == 0 && srcp2 == 0) {
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Sgl_setzero(result);
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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if (srcp1 == 0) {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp2,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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srcp1 = srcp2 << dst_exponent+1;
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srcp2 = 0;
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/*
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* since msb set is in second word, need to
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* adjust bit position count
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*/
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dst_exponent += 32;
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}
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else {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*
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*/
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Find_ms_one_bit(srcp1,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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if (dst_exponent >= 0) {
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Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
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srcp1);
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srcp2 <<= dst_exponent+1;
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}
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}
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Sgl_set_mantissa(result, srcp1 >> SGL_EXP_LENGTH);
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Sgl_set_exponent(result, (62+SGL_BIAS) - dst_exponent);
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/* check for inexact */
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if (Duint_isinexact_to_sgl(srcp1,srcp2)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Sgl_increment(result);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Sgl_roundnearest_from_duint(srcp1,srcp2,result);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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*dstptr = result;
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Double Unsigned Fixed to Double Floating-point
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*/
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int
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dbl_to_dbl_fcnvuf(
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dbl_unsigned *srcptr,
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unsigned int *nullptr,
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dbl_floating_point *dstptr,
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unsigned int *status)
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{
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register int dst_exponent;
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register unsigned int srcp1, srcp2, resultp1 = 0, resultp2 = 0;
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Duint_copyfromptr(srcptr,srcp1,srcp2);
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/* Check for zero */
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if (srcp1 == 0 && srcp2 ==0) {
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Dbl_setzero(resultp1,resultp2);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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if (srcp1 == 0) {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp2,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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srcp1 = srcp2 << dst_exponent+1;
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srcp2 = 0;
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/*
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* since msb set is in second word, need to
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* adjust bit position count
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*/
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dst_exponent += 32;
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}
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else {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp1,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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if (dst_exponent >= 0) {
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Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
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srcp1);
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srcp2 <<= dst_exponent+1;
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}
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}
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Dbl_set_mantissap1(resultp1, srcp1 >> DBL_EXP_LENGTH);
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Shiftdouble(srcp1,srcp2,DBL_EXP_LENGTH,resultp2);
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Dbl_set_exponent(resultp1, (62+DBL_BIAS) - dst_exponent);
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/* check for inexact */
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if (Duint_isinexact_to_dbl(srcp2)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Dbl_increment(resultp1,resultp2);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Dbl_roundnearest_from_duint(srcp2,resultp1,
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resultp2);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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