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2e23f54413
POWER8 introduces a new facility called the "Event Based Branch" facility. It contains of a few registers that indicate where a guest should branch to when a defined event occurs and it's in PR mode. We don't want to really enable EBB as it will create a big mess with !PR guest mode while hardware is in PR and we don't really emulate the PMU anyway. So instead, let's just leave it at emulation of all its registers. Signed-off-by: Alexander Graf <agraf@suse.de>
946 lines
23 KiB
C
946 lines
23 KiB
C
/*
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* Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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* Kevin Wolf <mail@kevin-wolf.de>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/44x.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kvm_host.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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#include <linux/gfp.h>
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#include <linux/sched.h>
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#include <linux/vmalloc.h>
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#include <linux/highmem.h>
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#include "book3s.h"
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#include "trace.h"
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#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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/* #define EXIT_DEBUG */
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "exits", VCPU_STAT(sum_exits) },
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{ "mmio", VCPU_STAT(mmio_exits) },
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{ "sig", VCPU_STAT(signal_exits) },
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{ "sysc", VCPU_STAT(syscall_exits) },
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{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
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{ "dec", VCPU_STAT(dec_exits) },
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{ "ext_intr", VCPU_STAT(ext_intr_exits) },
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{ "queue_intr", VCPU_STAT(queue_intr) },
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{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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{ "pf_storage", VCPU_STAT(pf_storage) },
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{ "sp_storage", VCPU_STAT(sp_storage) },
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{ "pf_instruc", VCPU_STAT(pf_instruc) },
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{ "sp_instruc", VCPU_STAT(sp_instruc) },
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{ "ld", VCPU_STAT(ld) },
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{ "ld_slow", VCPU_STAT(ld_slow) },
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{ "st", VCPU_STAT(st) },
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{ "st_slow", VCPU_STAT(st_slow) },
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{ NULL }
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};
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void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
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{
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}
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void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
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{
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}
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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if (!is_kvmppc_hv_enabled(vcpu->kvm))
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return to_book3s(vcpu)->hior;
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return 0;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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if (is_kvmppc_hv_enabled(vcpu->kvm))
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return;
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if (pending_now)
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kvmppc_set_int_pending(vcpu, 1);
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else if (old_pending)
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kvmppc_set_int_pending(vcpu, 0);
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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ulong crit_raw;
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ulong crit_r1;
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bool crit;
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if (is_kvmppc_hv_enabled(vcpu->kvm))
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return false;
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crit_raw = kvmppc_get_critical(vcpu);
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crit_r1 = kvmppc_get_gpr(vcpu, 1);
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/* Truncate crit indicators in 32 bit mode */
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if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
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return crit;
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}
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void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
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{
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kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
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kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
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kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
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vcpu->arch.mmu.reset_msr(vcpu);
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}
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static int kvmppc_book3s_vec2irqprio(unsigned int vec)
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{
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unsigned int prio;
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switch (vec) {
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case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
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case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
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case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
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case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
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case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
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case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
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case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
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case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
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case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
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case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
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case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
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case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
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case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
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case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
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case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
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case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
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case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
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default: prio = BOOK3S_IRQPRIO_MAX; break;
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}
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return prio;
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}
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void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
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unsigned int vec)
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{
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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clear_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
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old_pending);
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}
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void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
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{
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vcpu->stat.queue_intr++;
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set_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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#ifdef EXIT_DEBUG
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printk(KERN_INFO "Queueing interrupt %x\n", vec);
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#endif
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}
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EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
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{
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/* might as well deliver this straight away */
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kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
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void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
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void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
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if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
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vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
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kvmppc_book3s_queue_irqprio(vcpu, vec);
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}
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void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
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}
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int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
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{
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int deliver = 1;
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int vec = 0;
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bool crit = kvmppc_critical_section(vcpu);
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switch (priority) {
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case BOOK3S_IRQPRIO_DECREMENTER:
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deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
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vec = BOOK3S_INTERRUPT_DECREMENTER;
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break;
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case BOOK3S_IRQPRIO_EXTERNAL:
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case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
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deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
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vec = BOOK3S_INTERRUPT_EXTERNAL;
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break;
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case BOOK3S_IRQPRIO_SYSTEM_RESET:
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vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
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break;
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case BOOK3S_IRQPRIO_MACHINE_CHECK:
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vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
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break;
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case BOOK3S_IRQPRIO_DATA_STORAGE:
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vec = BOOK3S_INTERRUPT_DATA_STORAGE;
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break;
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case BOOK3S_IRQPRIO_INST_STORAGE:
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vec = BOOK3S_INTERRUPT_INST_STORAGE;
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break;
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case BOOK3S_IRQPRIO_DATA_SEGMENT:
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vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
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break;
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case BOOK3S_IRQPRIO_INST_SEGMENT:
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vec = BOOK3S_INTERRUPT_INST_SEGMENT;
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break;
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case BOOK3S_IRQPRIO_ALIGNMENT:
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vec = BOOK3S_INTERRUPT_ALIGNMENT;
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break;
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case BOOK3S_IRQPRIO_PROGRAM:
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vec = BOOK3S_INTERRUPT_PROGRAM;
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break;
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case BOOK3S_IRQPRIO_VSX:
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vec = BOOK3S_INTERRUPT_VSX;
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break;
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case BOOK3S_IRQPRIO_ALTIVEC:
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vec = BOOK3S_INTERRUPT_ALTIVEC;
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break;
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case BOOK3S_IRQPRIO_FP_UNAVAIL:
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vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
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break;
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case BOOK3S_IRQPRIO_SYSCALL:
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vec = BOOK3S_INTERRUPT_SYSCALL;
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break;
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case BOOK3S_IRQPRIO_DEBUG:
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vec = BOOK3S_INTERRUPT_TRACE;
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break;
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case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
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vec = BOOK3S_INTERRUPT_PERFMON;
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break;
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case BOOK3S_IRQPRIO_FAC_UNAVAIL:
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vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
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break;
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default:
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deliver = 0;
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printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
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break;
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}
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#if 0
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printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
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#endif
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if (deliver)
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kvmppc_inject_interrupt(vcpu, vec, 0);
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return deliver;
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}
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/*
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* This function determines if an irqprio should be cleared once issued.
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*/
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static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
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{
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switch (priority) {
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case BOOK3S_IRQPRIO_DECREMENTER:
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/* DEC interrupts get cleared by mtdec */
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return false;
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case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
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/* External interrupts get cleared by userspace */
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return false;
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}
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return true;
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}
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int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
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{
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unsigned long *pending = &vcpu->arch.pending_exceptions;
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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unsigned int priority;
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#ifdef EXIT_DEBUG
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if (vcpu->arch.pending_exceptions)
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printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
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#endif
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priority = __ffs(*pending);
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while (priority < BOOK3S_IRQPRIO_MAX) {
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if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
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clear_irqprio(vcpu, priority)) {
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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break;
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}
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priority = find_next_bit(pending,
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BITS_PER_BYTE * sizeof(*pending),
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priority + 1);
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}
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/* Tell the guest about our interrupt status */
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kvmppc_update_int_pending(vcpu, *pending, old_pending);
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
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pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, bool writing,
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bool *writable)
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{
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ulong mp_pa = vcpu->arch.magic_page_pa;
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if (!(kvmppc_get_msr(vcpu) & MSR_SF))
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mp_pa = (uint32_t)mp_pa;
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/* Magic page override */
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if (unlikely(mp_pa) &&
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unlikely(((gfn << PAGE_SHIFT) & KVM_PAM) ==
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((mp_pa & PAGE_MASK) & KVM_PAM))) {
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ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
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pfn_t pfn;
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pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
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get_page(pfn_to_page(pfn));
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if (writable)
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*writable = true;
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return pfn;
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}
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return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
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}
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EXPORT_SYMBOL_GPL(kvmppc_gfn_to_pfn);
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static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data,
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bool iswrite, struct kvmppc_pte *pte)
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{
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int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
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int r;
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if (relocated) {
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r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
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} else {
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pte->eaddr = eaddr;
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pte->raddr = eaddr & KVM_PAM;
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pte->vpage = VSID_REAL | eaddr >> 12;
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pte->may_read = true;
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pte->may_write = true;
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pte->may_execute = true;
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r = 0;
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}
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return r;
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}
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static hva_t kvmppc_bad_hva(void)
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{
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return PAGE_OFFSET;
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}
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static hva_t kvmppc_pte_to_hva(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte,
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bool read)
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{
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hva_t hpage;
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if (read && !pte->may_read)
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goto err;
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if (!read && !pte->may_write)
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goto err;
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hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
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if (kvm_is_error_hva(hpage))
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goto err;
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return hpage | (pte->raddr & ~PAGE_MASK);
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err:
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return kvmppc_bad_hva();
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}
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int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
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bool data)
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{
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struct kvmppc_pte pte;
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vcpu->stat.st++;
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if (kvmppc_xlate(vcpu, *eaddr, data, true, &pte))
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return -ENOENT;
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*eaddr = pte.raddr;
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if (!pte.may_write)
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return -EPERM;
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if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
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return EMULATE_DO_MMIO;
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return EMULATE_DONE;
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}
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EXPORT_SYMBOL_GPL(kvmppc_st);
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|
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int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
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bool data)
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{
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struct kvmppc_pte pte;
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hva_t hva = *eaddr;
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vcpu->stat.ld++;
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if (kvmppc_xlate(vcpu, *eaddr, data, false, &pte))
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goto nopte;
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*eaddr = pte.raddr;
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hva = kvmppc_pte_to_hva(vcpu, &pte, true);
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if (kvm_is_error_hva(hva))
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goto mmio;
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|
|
if (copy_from_user(ptr, (void __user *)hva, size)) {
|
|
printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva);
|
|
goto mmio;
|
|
}
|
|
|
|
return EMULATE_DONE;
|
|
|
|
nopte:
|
|
return -ENOENT;
|
|
mmio:
|
|
return EMULATE_DO_MMIO;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvmppc_ld);
|
|
|
|
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
|
|
{
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
{
|
|
int i;
|
|
|
|
regs->pc = kvmppc_get_pc(vcpu);
|
|
regs->cr = kvmppc_get_cr(vcpu);
|
|
regs->ctr = kvmppc_get_ctr(vcpu);
|
|
regs->lr = kvmppc_get_lr(vcpu);
|
|
regs->xer = kvmppc_get_xer(vcpu);
|
|
regs->msr = kvmppc_get_msr(vcpu);
|
|
regs->srr0 = kvmppc_get_srr0(vcpu);
|
|
regs->srr1 = kvmppc_get_srr1(vcpu);
|
|
regs->pid = vcpu->arch.pid;
|
|
regs->sprg0 = kvmppc_get_sprg0(vcpu);
|
|
regs->sprg1 = kvmppc_get_sprg1(vcpu);
|
|
regs->sprg2 = kvmppc_get_sprg2(vcpu);
|
|
regs->sprg3 = kvmppc_get_sprg3(vcpu);
|
|
regs->sprg4 = kvmppc_get_sprg4(vcpu);
|
|
regs->sprg5 = kvmppc_get_sprg5(vcpu);
|
|
regs->sprg6 = kvmppc_get_sprg6(vcpu);
|
|
regs->sprg7 = kvmppc_get_sprg7(vcpu);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
{
|
|
int i;
|
|
|
|
kvmppc_set_pc(vcpu, regs->pc);
|
|
kvmppc_set_cr(vcpu, regs->cr);
|
|
kvmppc_set_ctr(vcpu, regs->ctr);
|
|
kvmppc_set_lr(vcpu, regs->lr);
|
|
kvmppc_set_xer(vcpu, regs->xer);
|
|
kvmppc_set_msr(vcpu, regs->msr);
|
|
kvmppc_set_srr0(vcpu, regs->srr0);
|
|
kvmppc_set_srr1(vcpu, regs->srr1);
|
|
kvmppc_set_sprg0(vcpu, regs->sprg0);
|
|
kvmppc_set_sprg1(vcpu, regs->sprg1);
|
|
kvmppc_set_sprg2(vcpu, regs->sprg2);
|
|
kvmppc_set_sprg3(vcpu, regs->sprg3);
|
|
kvmppc_set_sprg4(vcpu, regs->sprg4);
|
|
kvmppc_set_sprg5(vcpu, regs->sprg5);
|
|
kvmppc_set_sprg6(vcpu, regs->sprg6);
|
|
kvmppc_set_sprg7(vcpu, regs->sprg7);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
|
|
{
|
|
int r;
|
|
union kvmppc_one_reg val;
|
|
int size;
|
|
long int i;
|
|
|
|
size = one_reg_size(reg->id);
|
|
if (size > sizeof(val))
|
|
return -EINVAL;
|
|
|
|
r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val);
|
|
if (r == -EINVAL) {
|
|
r = 0;
|
|
switch (reg->id) {
|
|
case KVM_REG_PPC_DAR:
|
|
val = get_reg_val(reg->id, kvmppc_get_dar(vcpu));
|
|
break;
|
|
case KVM_REG_PPC_DSISR:
|
|
val = get_reg_val(reg->id, kvmppc_get_dsisr(vcpu));
|
|
break;
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
|
i = reg->id - KVM_REG_PPC_FPR0;
|
|
val = get_reg_val(reg->id, VCPU_FPR(vcpu, i));
|
|
break;
|
|
case KVM_REG_PPC_FPSCR:
|
|
val = get_reg_val(reg->id, vcpu->arch.fp.fpscr);
|
|
break;
|
|
#ifdef CONFIG_ALTIVEC
|
|
case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
|
|
break;
|
|
case KVM_REG_PPC_VSCR:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
|
|
break;
|
|
case KVM_REG_PPC_VRSAVE:
|
|
val = get_reg_val(reg->id, vcpu->arch.vrsave);
|
|
break;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
#ifdef CONFIG_VSX
|
|
case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
|
|
if (cpu_has_feature(CPU_FTR_VSX)) {
|
|
long int i = reg->id - KVM_REG_PPC_VSR0;
|
|
val.vsxval[0] = vcpu->arch.fp.fpr[i][0];
|
|
val.vsxval[1] = vcpu->arch.fp.fpr[i][1];
|
|
} else {
|
|
r = -ENXIO;
|
|
}
|
|
break;
|
|
#endif /* CONFIG_VSX */
|
|
case KVM_REG_PPC_DEBUG_INST: {
|
|
u32 opcode = INS_TW;
|
|
r = copy_to_user((u32 __user *)(long)reg->addr,
|
|
&opcode, sizeof(u32));
|
|
break;
|
|
}
|
|
#ifdef CONFIG_KVM_XICS
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
if (!vcpu->arch.icp) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val = get_reg_val(reg->id, kvmppc_xics_get_icp(vcpu));
|
|
break;
|
|
#endif /* CONFIG_KVM_XICS */
|
|
case KVM_REG_PPC_FSCR:
|
|
val = get_reg_val(reg->id, vcpu->arch.fscr);
|
|
break;
|
|
case KVM_REG_PPC_TAR:
|
|
val = get_reg_val(reg->id, vcpu->arch.tar);
|
|
break;
|
|
case KVM_REG_PPC_EBBHR:
|
|
val = get_reg_val(reg->id, vcpu->arch.ebbhr);
|
|
break;
|
|
case KVM_REG_PPC_EBBRR:
|
|
val = get_reg_val(reg->id, vcpu->arch.ebbrr);
|
|
break;
|
|
case KVM_REG_PPC_BESCR:
|
|
val = get_reg_val(reg->id, vcpu->arch.bescr);
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
}
|
|
if (r)
|
|
return r;
|
|
|
|
if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
|
|
r = -EFAULT;
|
|
|
|
return r;
|
|
}
|
|
|
|
int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
|
|
{
|
|
int r;
|
|
union kvmppc_one_reg val;
|
|
int size;
|
|
long int i;
|
|
|
|
size = one_reg_size(reg->id);
|
|
if (size > sizeof(val))
|
|
return -EINVAL;
|
|
|
|
if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
|
|
return -EFAULT;
|
|
|
|
r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val);
|
|
if (r == -EINVAL) {
|
|
r = 0;
|
|
switch (reg->id) {
|
|
case KVM_REG_PPC_DAR:
|
|
kvmppc_set_dar(vcpu, set_reg_val(reg->id, val));
|
|
break;
|
|
case KVM_REG_PPC_DSISR:
|
|
kvmppc_set_dsisr(vcpu, set_reg_val(reg->id, val));
|
|
break;
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
|
i = reg->id - KVM_REG_PPC_FPR0;
|
|
VCPU_FPR(vcpu, i) = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_FPSCR:
|
|
vcpu->arch.fp.fpscr = set_reg_val(reg->id, val);
|
|
break;
|
|
#ifdef CONFIG_ALTIVEC
|
|
case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
|
|
break;
|
|
case KVM_REG_PPC_VSCR:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_VRSAVE:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
vcpu->arch.vrsave = set_reg_val(reg->id, val);
|
|
break;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
#ifdef CONFIG_VSX
|
|
case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
|
|
if (cpu_has_feature(CPU_FTR_VSX)) {
|
|
long int i = reg->id - KVM_REG_PPC_VSR0;
|
|
vcpu->arch.fp.fpr[i][0] = val.vsxval[0];
|
|
vcpu->arch.fp.fpr[i][1] = val.vsxval[1];
|
|
} else {
|
|
r = -ENXIO;
|
|
}
|
|
break;
|
|
#endif /* CONFIG_VSX */
|
|
#ifdef CONFIG_KVM_XICS
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
if (!vcpu->arch.icp) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
r = kvmppc_xics_set_icp(vcpu,
|
|
set_reg_val(reg->id, val));
|
|
break;
|
|
#endif /* CONFIG_KVM_XICS */
|
|
case KVM_REG_PPC_FSCR:
|
|
vcpu->arch.fscr = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_TAR:
|
|
vcpu->arch.tar = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_EBBHR:
|
|
vcpu->arch.ebbhr = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_EBBRR:
|
|
vcpu->arch.ebbrr = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_BESCR:
|
|
vcpu->arch.bescr = set_reg_val(reg->id, val);
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|
{
|
|
vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
|
|
}
|
|
|
|
void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
|
|
{
|
|
vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
|
|
}
|
|
|
|
void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
|
|
{
|
|
vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvmppc_set_msr);
|
|
|
|
int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
|
|
{
|
|
return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
|
|
struct kvm_translation *tr)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
|
struct kvm_guest_debug *dbg)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
void kvmppc_decrementer_func(unsigned long data)
|
|
{
|
|
struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
|
|
|
|
kvmppc_core_queue_dec(vcpu);
|
|
kvm_vcpu_kick(vcpu);
|
|
}
|
|
|
|
struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
|
|
{
|
|
return kvm->arch.kvm_ops->vcpu_create(kvm, id);
|
|
}
|
|
|
|
void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
|
|
{
|
|
vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
|
|
}
|
|
|
|
int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
|
|
{
|
|
return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
|
|
}
|
|
|
|
int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
|
|
{
|
|
return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
|
|
}
|
|
|
|
void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
|
|
struct kvm_memory_slot *dont)
|
|
{
|
|
kvm->arch.kvm_ops->free_memslot(free, dont);
|
|
}
|
|
|
|
int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
|
|
unsigned long npages)
|
|
{
|
|
return kvm->arch.kvm_ops->create_memslot(slot, npages);
|
|
}
|
|
|
|
void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
|
|
{
|
|
kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
|
|
}
|
|
|
|
int kvmppc_core_prepare_memory_region(struct kvm *kvm,
|
|
struct kvm_memory_slot *memslot,
|
|
struct kvm_userspace_memory_region *mem)
|
|
{
|
|
return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
|
|
}
|
|
|
|
void kvmppc_core_commit_memory_region(struct kvm *kvm,
|
|
struct kvm_userspace_memory_region *mem,
|
|
const struct kvm_memory_slot *old)
|
|
{
|
|
kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old);
|
|
}
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
return kvm->arch.kvm_ops->unmap_hva(kvm, hva);
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_unmap_hva);
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
{
|
|
return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
|
|
}
|
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
return kvm->arch.kvm_ops->age_hva(kvm, hva);
|
|
}
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
|
|
}
|
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
{
|
|
kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
|
|
}
|
|
|
|
void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
|
|
{
|
|
vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
|
|
}
|
|
|
|
int kvmppc_core_init_vm(struct kvm *kvm)
|
|
{
|
|
|
|
#ifdef CONFIG_PPC64
|
|
INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
|
|
INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
|
|
#endif
|
|
|
|
return kvm->arch.kvm_ops->init_vm(kvm);
|
|
}
|
|
|
|
void kvmppc_core_destroy_vm(struct kvm *kvm)
|
|
{
|
|
kvm->arch.kvm_ops->destroy_vm(kvm);
|
|
|
|
#ifdef CONFIG_PPC64
|
|
kvmppc_rtas_tokens_free(kvm);
|
|
WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
|
|
#endif
|
|
}
|
|
|
|
int kvmppc_core_check_processor_compat(void)
|
|
{
|
|
/*
|
|
* We always return 0 for book3s. We check
|
|
* for compatability while loading the HV
|
|
* or PR module
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
static int kvmppc_book3s_init(void)
|
|
{
|
|
int r;
|
|
|
|
r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
|
|
if (r)
|
|
return r;
|
|
#ifdef CONFIG_KVM_BOOK3S_32
|
|
r = kvmppc_book3s_init_pr();
|
|
#endif
|
|
return r;
|
|
|
|
}
|
|
|
|
static void kvmppc_book3s_exit(void)
|
|
{
|
|
#ifdef CONFIG_KVM_BOOK3S_32
|
|
kvmppc_book3s_exit_pr();
|
|
#endif
|
|
kvm_exit();
|
|
}
|
|
|
|
module_init(kvmppc_book3s_init);
|
|
module_exit(kvmppc_book3s_exit);
|
|
|
|
/* On 32bit this is our one and only kernel module */
|
|
#ifdef CONFIG_KVM_BOOK3S_32
|
|
MODULE_ALIAS_MISCDEV(KVM_MINOR);
|
|
MODULE_ALIAS("devname:kvm");
|
|
#endif
|