Kevin Cernekee ea31a6b203 MIPS: Honor L2 bypass bit ... On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates that the L2 cache is disabled and therefore Linux should not attempt to use it. [Ralf: Moved the code added by Kevin's original patch into a separate function that can easily be replaced for platforms that need more a different probe.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org> Cc: <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/1723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2010-10-29 19:08:52 +01:00
..
c-octeon.c	MIPS: Octeon: Handle Octeon II caches.	2010-10-29 19:08:36 +01:00
c-r3k.c
c-r4k.c	MIPS: Remove wait argument of r4k_on_each_cpu	2010-10-29 19:08:25 +01:00
c-tx39.c
cache.c	MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modules	2010-04-12 17:26:21 +01:00
cerr-sb1.c
cex-gen.S
cex-oct.S
cex-sb1.S
dma-default.c	MIPS: Convert DMA to use dma-mapping-common.h	2010-10-29 19:08:31 +01:00
extable.c
fault.c	MIPS: add support for software performance events	2010-10-29 19:08:48 +01:00
highmem.c	mm: fix race in kunmap_atomic()	2010-10-27 18:03:05 -07:00
hugetlbpage.c
init.c
ioremap.c
Makefile	MIPS: Add -Werror to arch/mips/Kbuild	2010-08-05 13:25:44 +01:00
page.c
pgtable-32.c
pgtable-64.c
sc-ip22.c
sc-mips.c	MIPS: Honor L2 bypass bit	2010-10-29 19:08:52 +01:00
sc-r5k.c
sc-rm7k.c	MIPS: RM7000: Symbol should be static	2010-10-04 18:33:54 +01:00
tlb-r3k.c
tlb-r4k.c
tlb-r8k.c
tlbex-fault.S
tlbex.c	MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code	2010-10-29 19:08:50 +01:00
uasm.c	MIPS: Octeon: Apply CN63XXP1 errata workarounds.	2010-10-29 19:08:43 +01:00