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9ff16f0833
The GF13 can be only used in the following case:
The ECC data chunk is less then 1K bytes.
In mx23/mx28, the ecc data chunk is 512 bytes. So it is okay.
But in mx6q, we begin to use some large nand chip whose ecc
data chunk maybe 1K bytes long. So when the data chunk is 1K bytes,
we have to use the GF14.
This patch sets the Golois Field bit when the GF14 is needed.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
129 lines
4.6 KiB
C
129 lines
4.6 KiB
C
/*
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* Freescale GPMI NAND Flash Driver
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*
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* Copyright 2008-2011 Freescale Semiconductor, Inc.
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* Copyright 2008 Embedded Alley Solutions, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef __GPMI_NAND_BCH_REGS_H
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#define __GPMI_NAND_BCH_REGS_H
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#define HW_BCH_CTRL 0x00000000
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#define HW_BCH_CTRL_SET 0x00000004
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#define HW_BCH_CTRL_CLR 0x00000008
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#define HW_BCH_CTRL_TOG 0x0000000c
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#define BM_BCH_CTRL_COMPLETE_IRQ_EN (1 << 8)
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#define BM_BCH_CTRL_COMPLETE_IRQ (1 << 0)
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#define HW_BCH_STATUS0 0x00000010
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#define HW_BCH_MODE 0x00000020
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#define HW_BCH_ENCODEPTR 0x00000030
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#define HW_BCH_DATAPTR 0x00000040
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#define HW_BCH_METAPTR 0x00000050
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#define HW_BCH_LAYOUTSELECT 0x00000070
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#define HW_BCH_FLASH0LAYOUT0 0x00000080
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#define BP_BCH_FLASH0LAYOUT0_NBLOCKS 24
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#define BM_BCH_FLASH0LAYOUT0_NBLOCKS (0xff << BP_BCH_FLASH0LAYOUT0_NBLOCKS)
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#define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v) \
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(((v) << BP_BCH_FLASH0LAYOUT0_NBLOCKS) & BM_BCH_FLASH0LAYOUT0_NBLOCKS)
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#define BP_BCH_FLASH0LAYOUT0_META_SIZE 16
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#define BM_BCH_FLASH0LAYOUT0_META_SIZE (0xff << BP_BCH_FLASH0LAYOUT0_META_SIZE)
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#define BF_BCH_FLASH0LAYOUT0_META_SIZE(v) \
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(((v) << BP_BCH_FLASH0LAYOUT0_META_SIZE)\
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& BM_BCH_FLASH0LAYOUT0_META_SIZE)
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#define BP_BCH_FLASH0LAYOUT0_ECC0 12
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#define BM_BCH_FLASH0LAYOUT0_ECC0 (0xf << BP_BCH_FLASH0LAYOUT0_ECC0)
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#define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0 11
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#define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0 (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
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#define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \
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(GPMI_IS_MX6Q(x) \
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? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) \
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& MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0) \
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: (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) \
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& BM_BCH_FLASH0LAYOUT0_ECC0) \
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)
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#define MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14 10
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#define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14 \
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(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)
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#define BF_BCH_FLASH0LAYOUT0_GF(v, x) \
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((GPMI_IS_MX6Q(x) && ((v) == 14)) \
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? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) \
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& MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14) \
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: 0 \
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)
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#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0
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#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
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(0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
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#define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
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(0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
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#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \
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(GPMI_IS_MX6Q(x) \
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? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
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: ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
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)
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#define HW_BCH_FLASH0LAYOUT1 0x00000090
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#define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE 16
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#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE \
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(0xffff << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE)
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#define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v) \
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(((v) << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE) \
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& BM_BCH_FLASH0LAYOUT1_PAGE_SIZE)
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#define BP_BCH_FLASH0LAYOUT1_ECCN 12
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#define BM_BCH_FLASH0LAYOUT1_ECCN (0xf << BP_BCH_FLASH0LAYOUT1_ECCN)
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#define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN 11
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#define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
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#define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \
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(GPMI_IS_MX6Q(x) \
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? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) \
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& MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN) \
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: (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) \
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& BM_BCH_FLASH0LAYOUT1_ECCN) \
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)
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#define MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14 10
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#define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14 \
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(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)
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#define BF_BCH_FLASH0LAYOUT1_GF(v, x) \
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((GPMI_IS_MX6Q(x) && ((v) == 14)) \
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? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) \
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& MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14) \
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: 0 \
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)
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#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0
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#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
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(0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
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#define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
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(0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
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#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \
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(GPMI_IS_MX6Q(x) \
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? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
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: ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
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)
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#define HW_BCH_VERSION 0x00000160
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#endif
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