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34027ca2bb
The pin id for a given tuple listed in a fsl,pins property is calculated
by dividing the first entry (which is also a register offset) by 4.
As the first available register is at offset 0x8 and configures the pad
MX25_PAD_A10 the right id for this pin is 2. All other pins are off by
one, too.
This patch drops the definition MX25_PAD_RESERVE1 (together with its
only use) and decrements all following values by 1.
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
pinctrl-imx1-core.c | ||
pinctrl-imx1.c | ||
pinctrl-imx1.h | ||
pinctrl-imx6dl.c | ||
pinctrl-imx6q.c | ||
pinctrl-imx6sl.c | ||
pinctrl-imx6sx.c | ||
pinctrl-imx21.c | ||
pinctrl-imx23.c | ||
pinctrl-imx25.c | ||
pinctrl-imx27.c | ||
pinctrl-imx28.c | ||
pinctrl-imx35.c | ||
pinctrl-imx50.c | ||
pinctrl-imx51.c | ||
pinctrl-imx53.c | ||
pinctrl-imx.c | ||
pinctrl-imx.h | ||
pinctrl-mxs.c | ||
pinctrl-mxs.h | ||
pinctrl-vf610.c |