Soren Brinkmann 353dc6c47d clk/zynq/pll: Use #defines for fbdiv min/max values ...

Use more descriptive #defines for the minimum and maximum PLL
feedback divider.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

2013-08-20 07:54:41 +02:00

..

clkc.c

clk: zynq: Add clock controller driver

2013-05-27 09:21:17 +02:00

Makefile

arm: zynq: Migrate platform to clock controller

2013-05-27 09:21:22 +02:00

pll.c

clk/zynq/pll: Use #defines for fbdiv min/max values

2013-08-20 07:54:41 +02:00