Russell King 36bccb11a4 ARM: l2c: remove platforms/SoCs setting early BRESP ... Since we now automatically enable early BRESP in core L2C-310 code when we detect a Cortex-A9, we don't need platforms/SoCs to set this bit explicitly. Instead, they should seek to preserve the value of bit 30 in the auxiliary control register. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2014-05-30 00:48:51 +01:00
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alpha
arc	ARC: !PREEMPT: Ensure Return to kernel mode is IRQ safe	2014-04-30 08:21:43 -07:00
arm	ARM: l2c: remove platforms/SoCs setting early BRESP	2014-05-30 00:48:51 +01:00
arm64	- arm64 migrate_irqs() fix following commit ffde1de640 (irqchip: Gic:	2014-05-20 14:33:48 +09:00
avr32
blackfin
c6x
cris
frv
hexagon	Hexagon: Delete stale barrier.h	2014-05-01 10:09:47 -07:00
ia64	ia64: add renameat2 syscall	2014-05-20 10:59:38 +02:00
m32r
m68k	m68k: add renameat2 syscall	2014-05-20 10:59:37 +02:00
metag	metag: Remove _STK_LIM_MAX override	2014-05-15 00:30:32 +01:00
microblaze
mips	Drivercore bugfixes for v3.15	2014-05-21 17:54:55 +09:00
mn10300
openrisc
parisc	parisc: add renameat2 syscall	2014-05-20 10:59:37 +02:00
powerpc	powerpc: irq work racing with timer interrupt can result in timer interrupt hang	2014-05-12 14:29:28 +10:00
s390	Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6	2014-05-21 18:34:35 +09:00
score
sh	mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts	2014-04-25 16:05:40 -07:00
sparc	sparc64: Give more detailed information in {pgd,pmd}_ERROR() and kill pte_ERROR().	2014-05-03 22:56:25 -07:00
tile
um	mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts	2014-04-25 16:05:40 -07:00
unicore32
x86	x86-64, modify_ldt: Make support for 16-bit segments a runtime option	2014-05-14 16:33:54 -07:00
xtensa	Xtensa patchset for v3.15.	2014-05-05 15:36:59 -07:00
.gitignore
Kconfig