linux/arch/arm/include/debug/mvebu.S
Lior Amsalem da497f6fba ARM: mvebu: Align the internal registers virtual base to support LPAE
In order to be able to support the LPAE, the internal registers
virtual base must be aligned to 2MB. In LPAE section size is 2MB, in
earlyprintk we map the internal registers and it must be section
aligned.

Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:59 +00:00

26 lines
698 B
ArmAsm

/*
* Early serial output macro for Marvell SoC
*
* Copyright (C) 2012 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory Clement <gregory.clement@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000
.macro addruart, rp, rv, tmp
ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE
ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE
orr \rp, \rp, #0x00012000
orr \rv, \rv, #0x00012000
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>