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125 lines
3.7 KiB
C
125 lines
3.7 KiB
C
/*
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* Author: MontaVista Software, Inc.
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* <source@mvista.com>
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*
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* Based on the OMAP devices.c
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
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* Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
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* Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/dma-mapping.h>
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#include <linux/serial.h>
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#include <mach/irqs.h>
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#include <mach/hardware.h>
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#include <mach/common.h>
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#include <mach/mmc.h>
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#if defined(CONFIG_ARCH_MX1)
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/* GPIO port description */
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static struct mxc_gpio_port imx_gpio_ports[] = {
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{
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.chip.label = "gpio-0",
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.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
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.irq = MX1_GPIO_INT_PORTA,
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.virtual_irq_start = MXC_GPIO_IRQ_START,
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}, {
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.chip.label = "gpio-1",
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.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
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.irq = MX1_GPIO_INT_PORTB,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
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}, {
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.chip.label = "gpio-2",
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.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
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.irq = MX1_GPIO_INT_PORTC,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
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}, {
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.chip.label = "gpio-3",
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.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
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.irq = MX1_GPIO_INT_PORTD,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
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}
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};
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int __init imx1_register_gpios(void)
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{
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return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
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}
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#endif
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#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
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/* GPIO port description */
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#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \
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{ \
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.chip.label = "gpio-" #n, \
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.irq = _irq, \
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.base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
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n * 0x100), \
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.virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
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}
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#define DEFINE_MXC_GPIO_PORT(SOC, n) \
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{ \
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.chip.label = "gpio-" #n, \
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.base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
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n * 0x100), \
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.virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
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}
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#define DEFINE_MXC_GPIO_PORTS(SOC, pfx) \
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static struct mxc_gpio_port pfx ## _gpio_ports[] = { \
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DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO), \
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DEFINE_MXC_GPIO_PORT(SOC, 1), \
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DEFINE_MXC_GPIO_PORT(SOC, 2), \
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DEFINE_MXC_GPIO_PORT(SOC, 3), \
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DEFINE_MXC_GPIO_PORT(SOC, 4), \
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DEFINE_MXC_GPIO_PORT(SOC, 5), \
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}
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#ifdef CONFIG_MACH_MX21
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DEFINE_MXC_GPIO_PORTS(MX21, imx21);
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int __init imx21_register_gpios(void)
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{
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return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
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}
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#endif
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#ifdef CONFIG_MACH_MX27
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DEFINE_MXC_GPIO_PORTS(MX27, imx27);
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int __init imx27_register_gpios(void)
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{
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return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
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}
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#endif
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#endif
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