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292b293cee
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
50 lines
1.0 KiB
C
50 lines
1.0 KiB
C
#ifndef __ASM_HARDIRQ_H
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#define __ASM_HARDIRQ_H
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#include <linux/cache.h>
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#include <linux/threads.h>
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#include <asm/irq.h>
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#define NR_IPI 5
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typedef struct {
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unsigned int __softirq_pending;
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#ifdef CONFIG_SMP
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unsigned int ipi_irqs[NR_IPI];
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#endif
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} ____cacheline_aligned irq_cpustat_t;
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#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
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#define __inc_irq_stat(cpu, member) __IRQ_STAT(cpu, member)++
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#define __get_irq_stat(cpu, member) __IRQ_STAT(cpu, member)
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#ifdef CONFIG_SMP
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u64 smp_irq_stat_cpu(unsigned int cpu);
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#else
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#define smp_irq_stat_cpu(cpu) 0
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#endif
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#define arch_irq_stat_cpu smp_irq_stat_cpu
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#if NR_IRQS > 512
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#define HARDIRQ_BITS 10
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#elif NR_IRQS > 256
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#define HARDIRQ_BITS 9
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#else
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#define HARDIRQ_BITS 8
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#endif
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/*
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* The hardirq mask has to be large enough to have space
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* for potentially all IRQ sources in the system nesting
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* on a single CPU:
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*/
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#if (1 << HARDIRQ_BITS) < NR_IRQS
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# error HARDIRQ_BITS is too low!
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#endif
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#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
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#endif /* __ASM_HARDIRQ_H */
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