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3c86882341
Intel recommends to first flush the TLBs and then the caches on caching attribute changes. c_p_a() previously did it the other way round. Reorder that. The procedure is still not fully compliant to the Intel documentation because Intel recommends a all CPU synchronization step between the TLB flushes and the cache flushes. However on all new Intel CPUs this is now meaningless anyways because they support Self-Snoop and can skip the cache flush step anyway. [ mingo@elte.hu: decoupled from clflush and ported it to x86.git ] Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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| boot | ||
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| crypto | ||
| ia32 | ||
| kernel | ||
| lguest | ||
| lib | ||
| mach-default | ||
| mach-es7000 | ||
| mach-generic | ||
| mach-rdc321x | ||
| mach-visws | ||
| mach-voyager | ||
| math-emu | ||
| mm | ||
| oprofile | ||
| pci | ||
| power | ||
| vdso | ||
| video | ||
| xen | ||
| Kconfig | ||
| Kconfig.cpu | ||
| Kconfig.debug | ||
| Makefile | ||
| Makefile_32.cpu | ||