linux/drivers/pinctrl/intel
Mika Westerberg bcb48cca23 pinctrl: cherryview: Do not mask all interrupts in probe
The Cherryview GPIO controller has 8 or 16 wires connected to the I/O-APIC
which can be used directly by the platform/BIOS or drivers. One such wire
is used as SCI (System Control Interrupt) which ACPI depends on to be able
to trigger GPEs (General Purpose Events).

The pinctrl driver itself uses another IRQ resource which is wire OR of all
the 8 (or 16) wires and follows what BIOS has programmed to the IntSel
register of each pin.

Currently the driver masks all interrupts at probe time and this prevents
these direct interrupts from working as expected. The reason for this is
that some early stage prototypes had some pins misconfigured causing lots
of spurious interrupts.

We fix this by leaving the interrupt mask untouched. This allows SCI and
other direct interrupts work properly. What comes to the possible spurious
interrupts we switch the default handler to be handle_bad_irq() instead of
handle_simple_irq() (which was not correct anyway).

Reported-by: Yu C Chen <yu.c.chen@intel.com>
Reported-by: Anisse Astier <anisse@astier.eu>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-22 15:57:04 +02:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c This is the bulk of pin control changes for the v4.8 kernel cycle. 2016-07-28 17:06:51 -07:00
pinctrl-broxton.c
pinctrl-cherryview.c pinctrl: cherryview: Do not mask all interrupts in probe 2016-08-22 15:57:04 +02:00
pinctrl-intel.c pinctrl: intel: Protect set wake flow by spin lock 2016-07-11 11:15:33 +02:00
pinctrl-intel.h
pinctrl-merrifield.c pinctrl: intel: merrifield: Add missed header 2016-08-10 15:46:28 +02:00
pinctrl-sunrisepoint.c