Ralf Baechle db813fe5a7 [MIPS] Avoid indexed cacheops. ... On MP configurations it's highly dubious what this code will actually affect since blasting away cachelines may or may not do the right thing wrt. cache coherency. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2007-10-11 23:46:12 +01:00
..
c-r3k.c
c-r4k.c	[MIPS] Avoid indexed cacheops.	2007-10-11 23:46:12 +01:00
c-tx39.c
cache.c	[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.	2007-10-11 23:46:05 +01:00
cerr-sb1.c
cex-gen.S
cex-sb1.S
dma-default.c	[MIPS] R10000: Fix wrong test in dma-default.c	2007-09-11 19:03:25 +01:00
extable.c
fault.c	mm: fault feedback #2	2007-07-19 10:04:41 -07:00
highmem.c
init.c	[MIPS] Fix aliasing bug in copy_user_highpage.	2007-09-11 19:03:26 +01:00
ioremap.c
Makefile	[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.	2007-10-11 23:46:05 +01:00
pg-r4k.c	[MIPS] pg-r4k.c: Fix a typo in an R4600 v2 erratum workaround	2007-10-03 14:30:51 +01:00
pg-sb1.c	[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.	2007-10-11 23:46:05 +01:00
pgtable-32.c
pgtable-64.c
pgtable.c
sc-ip22.c
sc-mips.c
sc-r5k.c
sc-rm7k.c
tlb-r3k.c
tlb-r4k.c	[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2	2007-07-10 17:33:02 +01:00
tlb-r8k.c
tlbex-fault.S
tlbex.c	[MIPS] Add support for BCM47XX CPUs.	2007-10-11 23:46:02 +01:00