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426c457a32
Some of the newer MLC devices have a 6-byte ID sequence in which several field definitions differ from older chips in a manner that is not backward compatible. For instance: Samsung K9GAG08U0M (5-byte sequence): ec d5 14 b6 74 4th byte, bits 1:0 encode the page size: 0=1KiB, 1=2KiB, 2=4KiB, 3=8KiB 4th byte, bits 5:4 encode the block size: 0=64KiB, 1=128KiB, ... 4th byte, bit 6 encodes the OOB size: 0=8B/512B, 1=16B/512B Samsung K9GAG08U0D (6-byte sequence): ec d5 94 29 34 41 4th byte, bits 1:0 encode the page size: 0=2KiB, 1=4KiB, 3=8KiB, 4=rsvd 4th byte, bits 7;5:4 encode the block size: 0=128KiB, 1=256KiB, ... 4th byte, bits 6;3:2 encode the OOB size: 1=128B/page, 2=218B/page This patch uses the new 6-byte scheme if the following conditions are all true: 1) The ID code wraps around after exactly 6 bytes 2) Manufacturer is Samsung 3) 6th byte is zero The patch also extends the maximum OOB size from 128B to 256B. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> |
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.. | ||
alauda.c | ||
ams-delta.c | ||
atmel_nand_ecc.h | ||
atmel_nand.c | ||
au1550nd.c | ||
autcpu12.c | ||
bcm_umi_bch.c | ||
bcm_umi_nand.c | ||
bf5xx_nand.c | ||
cafe_nand.c | ||
cmx270_nand.c | ||
cs553x_nand.c | ||
davinci_nand.c | ||
denali.c | ||
denali.h | ||
diskonchip.c | ||
edb7312.c | ||
fsl_elbc_nand.c | ||
fsl_upm.c | ||
gpio.c | ||
h1910.c | ||
Kconfig | ||
Makefile | ||
mpc5121_nfc.c | ||
mxc_nand.c | ||
nand_base.c | ||
nand_bbt.c | ||
nand_bcm_umi.c | ||
nand_bcm_umi.h | ||
nand_ecc.c | ||
nand_ids.c | ||
nandsim.c | ||
ndfc.c | ||
nomadik_nand.c | ||
nuc900_nand.c | ||
omap2.c | ||
orion_nand.c | ||
pasemi_nand.c | ||
plat_nand.c | ||
ppchameleonevb.c | ||
pxa3xx_nand.c | ||
r852.c | ||
r852.h | ||
rtc_from4.c | ||
s3c2410.c | ||
sh_flctl.c | ||
sharpsl.c | ||
sm_common.c | ||
sm_common.h | ||
socrates_nand.c | ||
spia.c | ||
tmio_nand.c | ||
txx9ndfmc.c |