linux/arch/arm64
Suzuki K. Poulose 44eaacf1b8 arm64: Add 16K page size support
This patch turns on the 16K page support in the kernel. We
support 48bit VA (4 level page tables) and 47bit VA (3 level
page tables).

With 16K we can map 128 entries using contiguous bit hint
at level 3 to map 2M using single TLB entry.

TODO: 16K supports 32 contiguous entries at level 2 to get us
1G(which is not yet supported by the infrastructure). That should
be a separate patch altogether.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-10-19 17:55:12 +01:00
..
boot arm64: dts: juno: describe PMUs separately 2015-10-07 14:25:41 +01:00
configs
crypto
include arm64: Add 16K page size support 2015-10-19 17:55:12 +01:00
kernel arm64: Add page size to the kernel image header 2015-10-19 17:54:41 +01:00
kvm arm64: Add 16K page size support 2015-10-19 17:55:12 +01:00
lib arm64: add KASAN support 2015-10-12 17:46:36 +01:00
mm arm64: Add 16K page size support 2015-10-19 17:55:12 +01:00
net
xen
Kconfig arm64: Add 16K page size support 2015-10-19 17:55:12 +01:00
Kconfig.debug arm64: Clean config usages for page size 2015-10-19 17:53:57 +01:00
Kconfig.platforms
Makefile arm64: add KASAN support 2015-10-12 17:46:36 +01:00