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https://github.com/FEX-Emu/linux.git
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937a801576
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
/*
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* Copyright (C) 2004 by Basler Vision Technologies AG
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* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/gdb-stub.h>
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#include <asm/rm9k-ocd.h>
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#include <excite.h>
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#if defined(CONFIG_SERIAL_8250) && CONFIG_SERIAL_8250_NR_UARTS > 1
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#error Debug port used by serial driver
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#endif
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#define UART_CLK 25000000
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#define BASE_BAUD (UART_CLK / 16)
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#define REGISTER_BASE_0 0x0208UL
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#define REGISTER_BASE_1 0x0238UL
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#define REGISTER_BASE_DBG REGISTER_BASE_1
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#define CPRR 0x0004
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#define UACFG 0x0200
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#define UAINTS 0x0204
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#define UARBR (REGISTER_BASE_DBG + 0x0000)
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#define UATHR (REGISTER_BASE_DBG + 0x0004)
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#define UADLL (REGISTER_BASE_DBG + 0x0008)
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#define UAIER (REGISTER_BASE_DBG + 0x000c)
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#define UADLH (REGISTER_BASE_DBG + 0x0010)
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#define UAIIR (REGISTER_BASE_DBG + 0x0014)
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#define UAFCR (REGISTER_BASE_DBG + 0x0018)
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#define UALCR (REGISTER_BASE_DBG + 0x001c)
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#define UAMCR (REGISTER_BASE_DBG + 0x0020)
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#define UALSR (REGISTER_BASE_DBG + 0x0024)
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#define UAMSR (REGISTER_BASE_DBG + 0x0028)
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#define UASCR (REGISTER_BASE_DBG + 0x002c)
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#define PARITY_NONE 0
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#define PARITY_ODD 0x08
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#define PARITY_EVEN 0x18
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#define PARITY_MARK 0x28
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#define PARITY_SPACE 0x38
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#define DATA_5BIT 0x0
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#define DATA_6BIT 0x1
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#define DATA_7BIT 0x2
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#define DATA_8BIT 0x3
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#define STOP_1BIT 0x0
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#define STOP_2BIT 0x4
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#define BAUD_DBG 57600
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#define PARITY_DBG PARITY_NONE
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#define DATA_DBG DATA_8BIT
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#define STOP_DBG STOP_1BIT
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/* Initialize the serial port for KGDB debugging */
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void __init excite_kgdb_init(void)
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{
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const u32 divisor = BASE_BAUD / BAUD_DBG;
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/* Take the UART out of reset */
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titan_writel(0x00ff1cff, CPRR);
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titan_writel(0x00000000, UACFG);
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titan_writel(0x00000002, UACFG);
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titan_writel(0x0, UALCR);
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titan_writel(0x0, UAIER);
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/* Disable FIFOs */
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titan_writel(0x00, UAFCR);
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titan_writel(0x80, UALCR);
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titan_writel(divisor & 0xff, UADLL);
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titan_writel((divisor & 0xff00) >> 8, UADLH);
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titan_writel(0x0, UALCR);
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titan_writel(DATA_DBG | PARITY_DBG | STOP_DBG, UALCR);
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/* Enable receiver interrupt */
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titan_readl(UARBR);
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titan_writel(0x1, UAIER);
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}
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int getDebugChar(void)
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{
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while (!(titan_readl(UALSR) & 0x1));
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return titan_readl(UARBR);
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}
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int putDebugChar(int data)
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{
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while (!(titan_readl(UALSR) & 0x20));
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titan_writel(data, UATHR);
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return 1;
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}
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/* KGDB interrupt handler */
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asmlinkage void excite_kgdb_inthdl(void)
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{
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if (unlikely(
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((titan_readl(UAIIR) & 0x7) == 4)
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&& ((titan_readl(UARBR) & 0xff) == 0x3)))
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set_async_breakpoint(®s->cp0_epc);
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}
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