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9cf7172893
The endianness of memory accesses at EL2 and EL1 are configured by SCTLR_EL2.EE and SCTLR_EL1.EE respectively. When the kernel is booted, the state of SCTLR_EL{2,1}.EE is unknown, and thus the kernel must ensure that they are set before performing any memory accesses. This patch ensures that SCTLR_EL{2,1} are configured appropriately at boot for kernels of either endianness. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Matthew Leach <matthew.leach@arm.com> [catalin.marinas@arm.com: fix SCTLR_EL1.E0E bit setting in head.S] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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.. | ||
cache.S | ||
context.c | ||
copypage.c | ||
dma-mapping.c | ||
extable.c | ||
fault.c | ||
flush.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap.c | ||
Makefile | ||
mm.h | ||
mmap.c | ||
mmu.c | ||
pgd.c | ||
proc-macros.S | ||
proc.S | ||
tlb.S |