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cc07aabc53
Strings library contributed to glibc but re-licensed under GPLv2) - Optimised crypto algorithms making use of the ARMv8 crypto extensions (together with kernel API for using FPSIMD instructions in interrupt context) - Ftrace support - CPU topology parsing from DT - ESR_EL1 (Exception Syndrome Register) exposed to user space signal handlers for SIGSEGV/SIGBUS (useful to emulation tools like Qemu) - 1GB section linear mapping if applicable - Barriers usage clean-up - Default pgprot clean-up -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) iQIcBAABAgAGBQJTkb+CAAoJEGvWsS0AyF7xLyEQAJgL8s2SdDyd+R8aukNDu3n9 tCK7yVHO9Kg96dfeXVuSOVEo2jszo6R3nxzUL05FMovr230WBcmoeHvHz8ETGnw1 g0yO8Ltkckjevog4UleCa3wGtYISjvwwrTalzbqoEWzsF2AV8oiqv/yuIn/EdkUr jaOqfNsnAQa8TIz4vMhi/AVdJWTTU/F6WP80oqCbxqXu/WL2InuBlHtOJMbk1HDI u1DJUGDQ1B9OgSVRkAOjCjSsEtz8sDY3lXsg3V1qT5+NbZTyomYM2IiBLdgQcX4P t/rqX9nX4VmRQtzefeP5WhKFks2x80C0BKibWC4teeL++tJHbgbFkyjoZZGcP27o zued3cYABrjrcAEU6ko/LUiL2Q4ozBOzosClpjpWulCxNPzsOps82UZWo3F3XbAt xjE3k7WF9WeNBOJdDGrarEaSLdnjjgCLoWVs8cOUYLpOOrtdSw16D29jJ68U0Y5g 31wdwKxoueC8SFt8M9fP9J9Jyau08g+kvW1xQXrRmroppweFxjSpSy90imARyux/ wUFz79HxkQB79ZHpJ0I5TNrw/w+7pBnfVSKGPOzrk+ZUsaH76caNRBoffUCzFMzz T3Sc8A36TZtOIcGR/Q4DMZNFXlIUXDSzCHP2Iu0QoIjTd5Ex96cqNvy3nswCYWwv yGe3ZEqUq9+WL7snNW4v =Jj8U -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into next Pull arm64 updates from Catalin Marinas: - Optimised assembly string/memory routines (based on the AArch64 Cortex Strings library contributed to glibc but re-licensed under GPLv2) - Optimised crypto algorithms making use of the ARMv8 crypto extensions (together with kernel API for using FPSIMD instructions in interrupt context) - Ftrace support - CPU topology parsing from DT - ESR_EL1 (Exception Syndrome Register) exposed to user space signal handlers for SIGSEGV/SIGBUS (useful to emulation tools like Qemu) - 1GB section linear mapping if applicable - Barriers usage clean-up - Default pgprot clean-up Conflicts as per Catalin. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (57 commits) arm64: kernel: initialize broadcast hrtimer based clock event device arm64: ftrace: Add system call tracepoint arm64: ftrace: Add CALLER_ADDRx macros arm64: ftrace: Add dynamic ftrace support arm64: Add ftrace support ftrace: Add arm64 support to recordmcount arm64: Add 'notrace' attribute to unwind_frame() for ftrace arm64: add __ASSEMBLY__ in asm/insn.h arm64: Fix linker script entry point arm64: lib: Implement optimized string length routines arm64: lib: Implement optimized string compare routines arm64: lib: Implement optimized memcmp routine arm64: lib: Implement optimized memset routine arm64: lib: Implement optimized memmove routine arm64: lib: Implement optimized memcpy routine arm64: defconfig: enable a few more common/useful options in defconfig ftrace: Make CALLER_ADDRx macros more generic arm64: Fix deadlock scenario with smp_send_stop() arm64: Fix machine_shutdown() definition arm64: Support arch_irq_work_raise() via self IPIs ...
646 lines
14 KiB
C
646 lines
14 KiB
C
/*
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* SMP initialisation and IPI support
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* Based on arch/arm/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/cache.h>
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#include <linux/profile.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/seq_file.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/clockchips.h>
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#include <linux/completion.h>
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#include <linux/of.h>
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#include <linux/irq_work.h>
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <asm/cpu_ops.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/smp_plat.h>
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#include <asm/sections.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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* where to place its SVC stack
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*/
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struct secondary_data secondary_data;
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enum ipi_msg_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CALL_FUNC_SINGLE,
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IPI_CPU_STOP,
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IPI_TIMER,
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IPI_IRQ_WORK,
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};
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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static int boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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if (cpu_ops[cpu]->cpu_boot)
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return cpu_ops[cpu]->cpu_boot(cpu);
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return -EOPNOTSUPP;
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}
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static DECLARE_COMPLETION(cpu_running);
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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/*
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* We need to tell the secondary core where to find its stack and the
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* page tables.
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*/
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secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
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__flush_dcache_area(&secondary_data, sizeof(secondary_data));
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/*
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* Now bring the CPU into our world.
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*/
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ret = boot_secondary(cpu, idle);
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if (ret == 0) {
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/*
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* CPU was successfully started, wait for it to come online or
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* time out.
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*/
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu)) {
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pr_crit("CPU%u: failed to come online\n", cpu);
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ret = -EIO;
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}
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} else {
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pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
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}
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secondary_data.stack = NULL;
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return ret;
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}
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static void smp_store_cpu_info(unsigned int cpuid)
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{
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store_cpu_topology(cpuid);
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}
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/*
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* This is the secondary CPU boot entry. We're using this CPUs
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* idle thread stack, but a set of temporary page tables.
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*/
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asmlinkage void secondary_start_kernel(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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/*
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* All kernel threads share the same mm context; grab a
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* reference and switch to it.
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*/
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atomic_inc(&mm->mm_count);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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printk("CPU%u: Booted secondary processor\n", cpu);
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/*
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* TTBR0 is only used for the identity mapping at this stage. Make it
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* point to zero page to avoid speculatively fetching new entries.
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*/
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cpu_set_reserved_ttbr0();
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flush_tlb_all();
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preempt_disable();
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trace_hardirqs_off();
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if (cpu_ops[cpu]->cpu_postboot)
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cpu_ops[cpu]->cpu_postboot();
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/*
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* Enable GIC and timers.
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*/
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notify_cpu_starting(cpu);
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smp_store_cpu_info(cpu);
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/*
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* OK, now it's safe to let the boot CPU continue. Wait for
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* the CPU migration code to notice that the CPU is online
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* before we continue.
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*/
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set_cpu_online(cpu, true);
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complete(&cpu_running);
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local_dbg_enable();
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local_irq_enable();
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local_async_enable();
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/*
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* OK, it's off to the idle thread for us
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*/
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cpu_startup_entry(CPUHP_ONLINE);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int op_cpu_disable(unsigned int cpu)
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{
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/*
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* If we don't have a cpu_die method, abort before we reach the point
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* of no return. CPU0 may not have an cpu_ops, so test for it.
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*/
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if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
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return -EOPNOTSUPP;
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/*
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* We may need to abort a hot unplug for some other mechanism-specific
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* reason.
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*/
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if (cpu_ops[cpu]->cpu_disable)
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return cpu_ops[cpu]->cpu_disable(cpu);
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return 0;
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}
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/*
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* __cpu_disable runs on the processor to be shutdown.
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*/
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int __cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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int ret;
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ret = op_cpu_disable(cpu);
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if (ret)
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return ret;
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/*
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* Take this CPU offline. Once we clear this, we can't return,
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* and we must not schedule until we're ready to give up the cpu.
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*/
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set_cpu_online(cpu, false);
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/*
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* OK - migrate IRQs away from this CPU
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*/
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migrate_irqs();
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/*
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* Remove this CPU from the vm mask set of all processes.
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*/
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clear_tasks_mm_cpumask(cpu);
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return 0;
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}
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static int op_cpu_kill(unsigned int cpu)
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{
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/*
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* If we have no means of synchronising with the dying CPU, then assume
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* that it is really dead. We can only wait for an arbitrary length of
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* time and hope that it's dead, so let's skip the wait and just hope.
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*/
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if (!cpu_ops[cpu]->cpu_kill)
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return 1;
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return cpu_ops[cpu]->cpu_kill(cpu);
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}
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static DECLARE_COMPLETION(cpu_died);
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/*
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* called on the thread which is asking for a CPU to be shutdown -
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* waits until shutdown has completed, or it is timed out.
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*/
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void __cpu_die(unsigned int cpu)
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{
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if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
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pr_crit("CPU%u: cpu didn't die\n", cpu);
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return;
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}
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pr_notice("CPU%u: shutdown\n", cpu);
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/*
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* Now that the dying CPU is beyond the point of no return w.r.t.
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* in-kernel synchronisation, try to get the firwmare to help us to
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* verify that it has really left the kernel before we consider
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* clobbering anything it might still be using.
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*/
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if (!op_cpu_kill(cpu))
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pr_warn("CPU%d may not have shut down cleanly\n", cpu);
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}
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/*
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* Called from the idle thread for the CPU which has been shutdown.
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*
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* Note that we disable IRQs here, but do not re-enable them
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* before returning to the caller. This is also the behaviour
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* of the other hotplug-cpu capable cores, so presumably coming
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* out of idle fixes this.
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*/
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void cpu_die(void)
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{
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unsigned int cpu = smp_processor_id();
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idle_task_exit();
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local_irq_disable();
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/* Tell __cpu_die() that this CPU is now safe to dispose of */
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complete(&cpu_died);
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/*
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* Actually shutdown the CPU. This must never fail. The specific hotplug
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* mechanism must perform all required cache maintenance to ensure that
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* no dirty lines are lost in the process of shutting down the CPU.
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*/
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cpu_ops[cpu]->cpu_die(cpu);
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BUG();
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}
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#endif
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
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}
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void __init smp_prepare_boot_cpu(void)
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{
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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}
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static void (*smp_cross_call)(const struct cpumask *, unsigned int);
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/*
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* Enumerate the possible CPU set from the device tree and build the
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* cpu logical map array containing MPIDR values related to logical
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* cpus. Assumes that cpu_logical_map(0) has already been initialized.
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*/
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void __init smp_init_cpus(void)
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{
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struct device_node *dn = NULL;
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unsigned int i, cpu = 1;
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bool bootcpu_valid = false;
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while ((dn = of_find_node_by_type(dn, "cpu"))) {
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const u32 *cell;
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u64 hwid;
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/*
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* A cpu node with missing "reg" property is
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* considered invalid to build a cpu_logical_map
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* entry.
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*/
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cell = of_get_property(dn, "reg", NULL);
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if (!cell) {
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pr_err("%s: missing reg property\n", dn->full_name);
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goto next;
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}
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hwid = of_read_number(cell, of_n_addr_cells(dn));
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/*
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* Non affinity bits must be set to 0 in the DT
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*/
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if (hwid & ~MPIDR_HWID_BITMASK) {
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pr_err("%s: invalid reg property\n", dn->full_name);
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goto next;
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}
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/*
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* Duplicate MPIDRs are a recipe for disaster. Scan
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* all initialized entries and check for
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* duplicates. If any is found just ignore the cpu.
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* cpu_logical_map was initialized to INVALID_HWID to
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* avoid matching valid MPIDR values.
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*/
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for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
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if (cpu_logical_map(i) == hwid) {
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pr_err("%s: duplicate cpu reg properties in the DT\n",
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dn->full_name);
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goto next;
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}
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}
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/*
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* The numbering scheme requires that the boot CPU
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* must be assigned logical id 0. Record it so that
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* the logical map built from DT is validated and can
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* be used.
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*/
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if (hwid == cpu_logical_map(0)) {
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if (bootcpu_valid) {
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pr_err("%s: duplicate boot cpu reg property in DT\n",
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dn->full_name);
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goto next;
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}
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bootcpu_valid = true;
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/*
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* cpu_logical_map has already been
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* initialized and the boot cpu doesn't need
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* the enable-method so continue without
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* incrementing cpu.
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*/
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continue;
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}
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if (cpu >= NR_CPUS)
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goto next;
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if (cpu_read_ops(dn, cpu) != 0)
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goto next;
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if (cpu_ops[cpu]->cpu_init(dn, cpu))
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goto next;
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pr_debug("cpu logical map 0x%llx\n", hwid);
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cpu_logical_map(cpu) = hwid;
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next:
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cpu++;
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}
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/* sanity check */
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if (cpu > NR_CPUS)
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pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
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cpu, NR_CPUS);
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if (!bootcpu_valid) {
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pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
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return;
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}
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/*
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* All the cpus that made it to the cpu_logical_map have been
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* validated so set them as possible cpus.
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*/
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for (i = 0; i < NR_CPUS; i++)
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if (cpu_logical_map(i) != INVALID_HWID)
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set_cpu_possible(i, true);
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int err;
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unsigned int cpu, ncores = num_possible_cpus();
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init_cpu_topology();
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smp_store_cpu_info(smp_processor_id());
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/*
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* are we trying to boot more cores than exist?
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*/
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if (max_cpus > ncores)
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max_cpus = ncores;
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/* Don't bother if we're effectively UP */
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if (max_cpus <= 1)
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return;
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/*
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* Initialise the present map (which describes the set of CPUs
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* actually populated at the present time) and release the
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* secondaries from the bootloader.
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*
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* Make sure we online at most (max_cpus - 1) additional CPUs.
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*/
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max_cpus--;
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for_each_possible_cpu(cpu) {
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if (max_cpus == 0)
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break;
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if (cpu == smp_processor_id())
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continue;
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if (!cpu_ops[cpu])
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continue;
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err = cpu_ops[cpu]->cpu_prepare(cpu);
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if (err)
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continue;
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set_cpu_present(cpu, true);
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max_cpus--;
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}
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}
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void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
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{
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smp_cross_call = fn;
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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smp_cross_call(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
|
|
}
|
|
|
|
#ifdef CONFIG_IRQ_WORK
|
|
void arch_irq_work_raise(void)
|
|
{
|
|
if (smp_cross_call)
|
|
smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
|
|
}
|
|
#endif
|
|
|
|
static const char *ipi_types[NR_IPI] = {
|
|
#define S(x,s) [x - IPI_RESCHEDULE] = s
|
|
S(IPI_RESCHEDULE, "Rescheduling interrupts"),
|
|
S(IPI_CALL_FUNC, "Function call interrupts"),
|
|
S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
|
|
S(IPI_CPU_STOP, "CPU stop interrupts"),
|
|
S(IPI_TIMER, "Timer broadcast interrupts"),
|
|
S(IPI_IRQ_WORK, "IRQ work interrupts"),
|
|
};
|
|
|
|
void show_ipi_list(struct seq_file *p, int prec)
|
|
{
|
|
unsigned int cpu, i;
|
|
|
|
for (i = 0; i < NR_IPI; i++) {
|
|
seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
|
|
prec >= 4 ? " " : "");
|
|
for_each_online_cpu(cpu)
|
|
seq_printf(p, "%10u ",
|
|
__get_irq_stat(cpu, ipi_irqs[i]));
|
|
seq_printf(p, " %s\n", ipi_types[i]);
|
|
}
|
|
}
|
|
|
|
u64 smp_irq_stat_cpu(unsigned int cpu)
|
|
{
|
|
u64 sum = 0;
|
|
int i;
|
|
|
|
for (i = 0; i < NR_IPI; i++)
|
|
sum += __get_irq_stat(cpu, ipi_irqs[i]);
|
|
|
|
return sum;
|
|
}
|
|
|
|
static DEFINE_RAW_SPINLOCK(stop_lock);
|
|
|
|
/*
|
|
* ipi_cpu_stop - handle IPI from smp_send_stop()
|
|
*/
|
|
static void ipi_cpu_stop(unsigned int cpu)
|
|
{
|
|
if (system_state == SYSTEM_BOOTING ||
|
|
system_state == SYSTEM_RUNNING) {
|
|
raw_spin_lock(&stop_lock);
|
|
pr_crit("CPU%u: stopping\n", cpu);
|
|
dump_stack();
|
|
raw_spin_unlock(&stop_lock);
|
|
}
|
|
|
|
set_cpu_online(cpu, false);
|
|
|
|
local_irq_disable();
|
|
|
|
while (1)
|
|
cpu_relax();
|
|
}
|
|
|
|
/*
|
|
* Main handler for inter-processor interrupts
|
|
*/
|
|
void handle_IPI(int ipinr, struct pt_regs *regs)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
|
|
__inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
|
|
|
|
switch (ipinr) {
|
|
case IPI_RESCHEDULE:
|
|
scheduler_ipi();
|
|
break;
|
|
|
|
case IPI_CALL_FUNC:
|
|
irq_enter();
|
|
generic_smp_call_function_interrupt();
|
|
irq_exit();
|
|
break;
|
|
|
|
case IPI_CALL_FUNC_SINGLE:
|
|
irq_enter();
|
|
generic_smp_call_function_single_interrupt();
|
|
irq_exit();
|
|
break;
|
|
|
|
case IPI_CPU_STOP:
|
|
irq_enter();
|
|
ipi_cpu_stop(cpu);
|
|
irq_exit();
|
|
break;
|
|
|
|
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
|
case IPI_TIMER:
|
|
irq_enter();
|
|
tick_receive_broadcast();
|
|
irq_exit();
|
|
break;
|
|
#endif
|
|
|
|
#ifdef CONFIG_IRQ_WORK
|
|
case IPI_IRQ_WORK:
|
|
irq_enter();
|
|
irq_work_run();
|
|
irq_exit();
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
|
|
break;
|
|
}
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
void smp_send_reschedule(int cpu)
|
|
{
|
|
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
|
|
}
|
|
|
|
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
|
void tick_broadcast(const struct cpumask *mask)
|
|
{
|
|
smp_cross_call(mask, IPI_TIMER);
|
|
}
|
|
#endif
|
|
|
|
void smp_send_stop(void)
|
|
{
|
|
unsigned long timeout;
|
|
|
|
if (num_online_cpus() > 1) {
|
|
cpumask_t mask;
|
|
|
|
cpumask_copy(&mask, cpu_online_mask);
|
|
cpu_clear(smp_processor_id(), mask);
|
|
|
|
smp_cross_call(&mask, IPI_CPU_STOP);
|
|
}
|
|
|
|
/* Wait up to one second for other CPUs to stop */
|
|
timeout = USEC_PER_SEC;
|
|
while (num_online_cpus() > 1 && timeout--)
|
|
udelay(1);
|
|
|
|
if (num_online_cpus() > 1)
|
|
pr_warning("SMP: failed to stop secondary CPUs\n");
|
|
}
|
|
|
|
/*
|
|
* not supported here
|
|
*/
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
{
|
|
return -EINVAL;
|
|
}
|