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77 lines
2.2 KiB
C
77 lines
2.2 KiB
C
/*
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* arch/sh/kernel/cpu/sh5/probe.c
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*
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* CPU Subtype Probing for SH-5.
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/string.h>
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#include <asm/processor.h>
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#include <asm/cache.h>
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int __init detect_cpu_and_cache_system(void)
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{
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unsigned long long cir;
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/* Do peeks in real mode to avoid having to set up a mapping for the
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WPC registers. On SH5-101 cut2, such a mapping would be exposed to
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an address translation erratum which would make it hard to set up
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correctly. */
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cir = peek_real_address_q(0x0d000008);
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if ((cir & 0xffff) == 0x5103) {
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boot_cpu_data.type = CPU_SH5_103;
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} else if (((cir >> 32) & 0xffff) == 0x51e2) {
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/* CPU.VCR aliased at CIR address on SH5-101 */
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boot_cpu_data.type = CPU_SH5_101;
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} else {
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boot_cpu_data.type = CPU_SH_NONE;
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}
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/*
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* First, setup some sane values for the I-cache.
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*/
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boot_cpu_data.icache.ways = 4;
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boot_cpu_data.icache.sets = 256;
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boot_cpu_data.icache.linesz = L1_CACHE_BYTES;
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#if 0
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/*
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* FIXME: This can probably be cleaned up a bit as well.. for example,
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* do we really need the way shift _and_ the way_step_shift ?? Judging
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* by the existing code, I would guess no.. is there any valid reason
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* why we need to be tracking this around?
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*/
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boot_cpu_data.icache.way_shift = 13;
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boot_cpu_data.icache.entry_shift = 5;
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boot_cpu_data.icache.set_shift = 4;
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boot_cpu_data.icache.way_step_shift = 16;
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boot_cpu_data.icache.asid_shift = 2;
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/*
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* way offset = cache size / associativity, so just don't factor in
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* associativity in the first place..
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*/
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boot_cpu_data.icache.way_ofs = boot_cpu_data.icache.sets *
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boot_cpu_data.icache.linesz;
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boot_cpu_data.icache.asid_mask = 0x3fc;
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boot_cpu_data.icache.idx_mask = 0x1fe0;
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boot_cpu_data.icache.epn_mask = 0xffffe000;
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#endif
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boot_cpu_data.icache.flags = 0;
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/* A trivial starting point.. */
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memcpy(&boot_cpu_data.dcache,
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&boot_cpu_data.icache, sizeof(struct cache_info));
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return 0;
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}
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