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652c393a33
There are several sources of unnecessary power consumption on Intel graphics systems. The first is the LVDS clock. TFTs don't suffer from persistence issues like CRTs, and so we can reduce the LVDS refresh rate when the screen is idle. It will be automatically upclocked when userspace triggers graphical activity. Beyond that, we can enable memory self refresh. This allows the memory to go into a lower power state when the graphics are idle. Finally, we can drop some clocks on the gpu itself. All of these things can be reenabled between frames when GPU activity is triggered, and so there should be no user visible graphical changes. Signed-off-by: Jesse Barnes <jesse.barnes@intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
425 lines
12 KiB
C
425 lines
12 KiB
C
/*
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* Copyright © 2006 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "intel_bios.h"
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#define SLAVE_ADDR1 0x70
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#define SLAVE_ADDR2 0x72
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static void *
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find_section(struct bdb_header *bdb, int section_id)
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{
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u8 *base = (u8 *)bdb;
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int index = 0;
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u16 total, current_size;
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u8 current_id;
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/* skip to first section */
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index += bdb->header_size;
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total = bdb->bdb_size;
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/* walk the sections looking for section_id */
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while (index < total) {
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current_id = *(base + index);
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index++;
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current_size = *((u16 *)(base + index));
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index += 2;
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if (current_id == section_id)
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return base + index;
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index += current_size;
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}
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return NULL;
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}
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static u16
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get_blocksize(void *p)
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{
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u16 *block_ptr, block_size;
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block_ptr = (u16 *)((char *)p - 2);
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block_size = *block_ptr;
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return block_size;
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}
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static void
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fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
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struct lvds_dvo_timing *dvo_timing)
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{
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panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
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dvo_timing->hactive_lo;
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panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
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((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
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panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
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dvo_timing->hsync_pulse_width;
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panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
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((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
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panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
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dvo_timing->vactive_lo;
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panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
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dvo_timing->vsync_off;
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panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
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dvo_timing->vsync_pulse_width;
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panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
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((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
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panel_fixed_mode->clock = dvo_timing->clock * 10;
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panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
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/* Some VBTs have bogus h/vtotal values */
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if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
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panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
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if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
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panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
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drm_mode_set_name(panel_fixed_mode);
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}
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/* Try to find integrated panel data */
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static void
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parse_lfp_panel_data(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct bdb_lvds_options *lvds_options;
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struct bdb_lvds_lfp_data *lvds_lfp_data;
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struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
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struct bdb_lvds_lfp_data_entry *entry;
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struct lvds_dvo_timing *dvo_timing;
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struct drm_display_mode *panel_fixed_mode;
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int lfp_data_size, dvo_timing_offset;
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/* Defaults if we can't find VBT info */
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dev_priv->lvds_dither = 0;
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dev_priv->lvds_vbt = 0;
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lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
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if (!lvds_options)
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return;
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dev_priv->lvds_dither = lvds_options->pixel_dither;
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if (lvds_options->panel_type == 0xff)
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return;
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lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
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if (!lvds_lfp_data)
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return;
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lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
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if (!lvds_lfp_data_ptrs)
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return;
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dev_priv->lvds_vbt = 1;
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lfp_data_size = lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
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lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
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entry = (struct bdb_lvds_lfp_data_entry *)
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((uint8_t *)lvds_lfp_data->data + (lfp_data_size *
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lvds_options->panel_type));
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dvo_timing_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
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lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
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/*
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* the size of fp_timing varies on the different platform.
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* So calculate the DVO timing relative offset in LVDS data
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* entry to get the DVO timing entry
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*/
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dvo_timing = (struct lvds_dvo_timing *)
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((unsigned char *)entry + dvo_timing_offset);
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panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
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fill_detail_timing_data(panel_fixed_mode, dvo_timing);
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dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
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DRM_DEBUG("Found panel mode in BIOS VBT tables:\n");
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drm_mode_debug_printmodeline(panel_fixed_mode);
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return;
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}
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/* Try to find sdvo panel data */
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static void
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parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct bdb_sdvo_lvds_options *sdvo_lvds_options;
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struct lvds_dvo_timing *dvo_timing;
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struct drm_display_mode *panel_fixed_mode;
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dev_priv->sdvo_lvds_vbt_mode = NULL;
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sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
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if (!sdvo_lvds_options)
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return;
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dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
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if (!dvo_timing)
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return;
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panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
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if (!panel_fixed_mode)
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return;
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fill_detail_timing_data(panel_fixed_mode,
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dvo_timing + sdvo_lvds_options->panel_type);
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dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
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return;
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}
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static void
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parse_general_features(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct bdb_general_features *general;
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/* Set sensible defaults in case we can't find the general block */
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dev_priv->int_tv_support = 1;
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dev_priv->int_crt_support = 1;
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general = find_section(bdb, BDB_GENERAL_FEATURES);
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if (general) {
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dev_priv->int_tv_support = general->int_tv_support;
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dev_priv->int_crt_support = general->int_crt_support;
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dev_priv->lvds_use_ssc = general->enable_ssc;
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if (dev_priv->lvds_use_ssc) {
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if (IS_I85X(dev_priv->dev))
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 66 : 48;
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else
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 100 : 96;
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}
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}
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}
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static void
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parse_general_definitions(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct bdb_general_definitions *general;
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const int crt_bus_map_table[] = {
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GPIOB,
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GPIOA,
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GPIOC,
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GPIOD,
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GPIOE,
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GPIOF,
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};
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/* Set sensible defaults in case we can't find the general block
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or it is the wrong chipset */
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dev_priv->crt_ddc_bus = -1;
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general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
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if (general) {
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u16 block_size = get_blocksize(general);
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if (block_size >= sizeof(*general)) {
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int bus_pin = general->crt_ddc_gmbus_pin;
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DRM_DEBUG("crt_ddc_bus_pin: %d\n", bus_pin);
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if ((bus_pin >= 1) && (bus_pin <= 6)) {
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dev_priv->crt_ddc_bus =
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crt_bus_map_table[bus_pin-1];
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}
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} else {
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DRM_DEBUG("BDB_GD too small (%d). Invalid.\n",
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block_size);
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}
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}
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}
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static void
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parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct sdvo_device_mapping *p_mapping;
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struct bdb_general_definitions *p_defs;
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struct child_device_config *p_child;
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int i, child_device_num, count;
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u16 block_size;
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p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
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if (!p_defs) {
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DRM_DEBUG("No general definition block is found\n");
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return;
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}
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/* judge whether the size of child device meets the requirements.
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* If the child device size obtained from general definition block
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* is different with sizeof(struct child_device_config), skip the
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* parsing of sdvo device info
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*/
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if (p_defs->child_dev_size != sizeof(*p_child)) {
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/* different child dev size . Ignore it */
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DRM_DEBUG("different child size is found. Invalid.\n");
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return;
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}
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/* get the block size of general definitions */
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block_size = get_blocksize(p_defs);
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/* get the number of child device */
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child_device_num = (block_size - sizeof(*p_defs)) /
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sizeof(*p_child);
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count = 0;
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for (i = 0; i < child_device_num; i++) {
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p_child = &(p_defs->devices[i]);
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if (!p_child->device_type) {
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/* skip the device block if device type is invalid */
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continue;
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}
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if (p_child->slave_addr != SLAVE_ADDR1 &&
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p_child->slave_addr != SLAVE_ADDR2) {
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/*
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* If the slave address is neither 0x70 nor 0x72,
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* it is not a SDVO device. Skip it.
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*/
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continue;
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}
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if (p_child->dvo_port != DEVICE_PORT_DVOB &&
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p_child->dvo_port != DEVICE_PORT_DVOC) {
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/* skip the incorrect SDVO port */
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DRM_DEBUG("Incorrect SDVO port. Skip it \n");
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continue;
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}
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DRM_DEBUG("the SDVO device with slave addr %2x is found on "
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"%s port\n",
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p_child->slave_addr,
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(p_child->dvo_port == DEVICE_PORT_DVOB) ?
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"SDVOB" : "SDVOC");
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p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
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if (!p_mapping->initialized) {
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p_mapping->dvo_port = p_child->dvo_port;
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p_mapping->slave_addr = p_child->slave_addr;
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p_mapping->dvo_wiring = p_child->dvo_wiring;
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p_mapping->initialized = 1;
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} else {
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DRM_DEBUG("Maybe one SDVO port is shared by "
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"two SDVO device.\n");
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}
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if (p_child->slave2_addr) {
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/* Maybe this is a SDVO device with multiple inputs */
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/* And the mapping info is not added */
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DRM_DEBUG("there exists the slave2_addr. Maybe this "
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"is a SDVO device with multiple inputs.\n");
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}
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count++;
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}
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if (!count) {
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/* No SDVO device info is found */
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DRM_DEBUG("No SDVO device info is found in VBT\n");
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}
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return;
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}
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static void
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parse_driver_features(struct drm_i915_private *dev_priv,
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struct bdb_header *bdb)
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{
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struct drm_device *dev = dev_priv->dev;
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struct bdb_driver_features *driver;
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/* set default for chips without eDP */
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if (!SUPPORTS_EDP(dev)) {
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dev_priv->edp_support = 0;
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return;
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}
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driver = find_section(bdb, BDB_DRIVER_FEATURES);
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if (!driver)
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return;
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if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
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dev_priv->edp_support = 1;
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if (driver->dual_frequency)
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dev_priv->render_reclock_avail = true;
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}
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/**
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* intel_init_bios - initialize VBIOS settings & find VBT
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* @dev: DRM device
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*
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* Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
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* to appropriate values.
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*
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* VBT existence is a sanity check that is relied on by other i830_bios.c code.
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* Note that it would be better to use a BIOS call to get the VBT, as BIOSes may
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* feed an updated VBT back through that, compared to what we'll fetch using
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* this method of groping around in the BIOS data.
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*
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* Returns 0 on success, nonzero on failure.
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*/
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bool
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intel_init_bios(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct pci_dev *pdev = dev->pdev;
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struct vbt_header *vbt = NULL;
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struct bdb_header *bdb;
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u8 __iomem *bios;
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size_t size;
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int i;
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bios = pci_map_rom(pdev, &size);
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if (!bios)
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return -1;
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/* Scour memory looking for the VBT signature */
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for (i = 0; i + 4 < size; i++) {
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if (!memcmp(bios + i, "$VBT", 4)) {
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vbt = (struct vbt_header *)(bios + i);
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break;
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}
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}
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if (!vbt) {
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DRM_ERROR("VBT signature missing\n");
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pci_unmap_rom(pdev, bios);
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return -1;
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}
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bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
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/* Grab useful general definitions */
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parse_general_features(dev_priv, bdb);
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parse_general_definitions(dev_priv, bdb);
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parse_lfp_panel_data(dev_priv, bdb);
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parse_sdvo_panel_data(dev_priv, bdb);
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parse_sdvo_device_mapping(dev_priv, bdb);
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parse_driver_features(dev_priv, bdb);
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pci_unmap_rom(pdev, bios);
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return 0;
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}
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