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87aef30eb3
Currently, S5P_TIMER_IRQ is based at the end of VICs. This patch changes the S5P_TIMER_IRQ base from end of VICs to 11 in ISA IRQ space. No of VICs varies between SOCs. This causes an exception on S5P6442. Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>