Nicolas Pitre 4c4925c1f4 [ARM] fix cache alignment code in memset.S
This code is currently disabled, which explains why no one was affected.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:37 +02:00
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