Vineet Gupta 2328af0c9c ARC: [SMP] Enable icache coherency ... icaches are not snooped hence not cohrent in SMP setups which means kernel has to do cross core calls to ensure the same. The leaf routine __ic_line_inv_vaddr() now does cross core calls. __sync_icache_dcache() is affected due to this: * local dcache line flushed ahead of remote icache inv requests * can't disable interrupts anymore, since __ic_line_inv_vaddr()->on_each_cpu() can deadlock. | WARNING: CPU: 0 PID: 1 at kernel/smp.c:374 | smp_call_function_many+0x25a/0x2c4() | | init_kprobes+0x90/0xc8 | register_kprobe+0x1d6/0x510 | __sync_icache_dcache+0x28/0x80 | | DISABLE IRQ | | __ic_line_inv_vaddr | on_each_cpu | smp_call_function_many+0x25a/0x2c4 --> WARN | __ic_line_inv_vaddr_local | __dc_line_op * TODO: Needs to use mask of relevant CPUs to avoid broadcasting Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2014-06-26 11:59:01 +05:30
..
cache_arc700.c	ARC: [SMP] Enable icache coherency	2014-06-26 11:59:01 +05:30
dma.c
extable.c
fault.c	ARC: Change calling convention of do_page_fault()	2013-11-06 10:41:39 +05:30
init.c	ARC: support external initrd	2014-03-26 14:31:27 +05:30
ioremap.c
Makefile	ARC: [mm] Aliasing VIPT dcache support 4/4	2013-05-09 22:00:57 +05:30
mmap.c	ARC: [mm] Aliasing VIPT dcache support 4/4	2013-05-09 22:00:57 +05:30
tlb.c	ARC: [SMP] TLB flush	2013-11-06 10:41:45 +05:30
tlbex.S	ARC: switch to generic ENTRY/END assembler annotations	2014-03-26 14:31:28 +05:30