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f3c8cfc237
Current pxa3xx_nand controller has two chip select which both be workable. This patch enable this feature. Update platform driver to support this feature. Another notice should be taken that: When you want to use this feature, you should not enable the keep configuration feature, for two chip select could be attached with different nand chip. The different page size and timing requirement make the keep configuration impossible. Signed-off-by: Lei Wen <leiwen@marvell.com>
476 lines
10 KiB
C
476 lines
10 KiB
C
/*
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* linux/arch/arm/mach-pxa/mxm8x10.c
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*
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* Support for the Embedian MXM-8x10 Computer on Module
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*
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* Copyright (C) 2006 Marvell International Ltd.
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* Copyright (C) 2009 Embedian Inc.
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* Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
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*
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* 2007-09-04: eric miao <eric.y.miao@gmail.com>
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* rewrite to align with latest kernel
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*
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* 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
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* Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
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* rework for upstream merge
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_8250.h>
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#include <linux/dm9000.h>
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#include <linux/gpio.h>
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#include <linux/i2c/pxa-i2c.h>
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#include <plat/pxa3xx_nand.h>
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#include <mach/pxafb.h>
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#include <mach/mmc.h>
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#include <mach/ohci.h>
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#include <mach/pxa320.h>
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#include <mach/mxm8x10.h>
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#include "devices.h"
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#include "generic.h"
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/* GPIO pin definition
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External device stuff - Leave unconfigured for now...
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---------------------
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GPIO0 - DREQ (External DMA Request)
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GPIO3 - nGCS2 (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
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GPIO4 - nGCS3
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GPIO15 - EXT_GPIO1
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GPIO16 - EXT_GPIO2
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GPIO17 - EXT_GPIO3
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GPIO24 - EXT_GPIO4
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GPIO25 - EXT_GPIO5
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GPIO26 - EXT_GPIO6
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GPIO27 - EXT_GPIO7
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GPIO28 - EXT_GPIO8
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GPIO29 - EXT_GPIO9
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GPIO30 - EXT_GPIO10
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GPIO31 - EXT_GPIO11
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GPIO57 - EXT_GPIO12
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GPIO74 - EXT_IRQ1
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GPIO75 - EXT_IRQ2
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GPIO76 - EXT_IRQ3
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GPIO77 - EXT_IRQ4
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GPIO78 - EXT_IRQ5
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GPIO79 - EXT_IRQ6
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GPIO80 - EXT_IRQ7
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GPIO81 - EXT_IRQ8
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GPIO87 - VCCIO_PWREN (External Device PWREN)
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Dallas 1-Wire - Leave unconfigured for now...
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-------------
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GPIO0_2 - DS - 1Wire
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Ethernet
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--------
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GPIO1 - DM9000 PWR
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GPIO9 - DM9K_nIRQ
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GPIO36 - DM9K_RESET
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Keypad - Leave unconfigured by for now...
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------
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GPIO1_2 - KP_DKIN0
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GPIO5_2 - KP_MKOUT7
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GPIO82 - KP_DKIN1
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GPIO85 - KP_DKIN2
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GPIO86 - KP_DKIN3
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GPIO113 - KP_MKIN0
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GPIO114 - KP_MKIN1
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GPIO115 - KP_MKIN2
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GPIO116 - KP_MKIN3
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GPIO117 - KP_MKIN4
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GPIO118 - KP_MKIN5
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GPIO119 - KP_MKIN6
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GPIO120 - KP_MKIN7
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GPIO121 - KP_MKOUT0
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GPIO122 - KP_MKOUT1
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GPIO122 - KP_MKOUT2
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GPIO123 - KP_MKOUT3
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GPIO124 - KP_MKOUT4
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GPIO125 - KP_MKOUT5
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GPIO127 - KP_MKOUT6
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Data Bus - Leave unconfigured for now...
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--------
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GPIO2 - nWait (Data Bus)
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USB Device
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----------
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GPIO4_2 - USBD_PULLUP
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GPIO10 - UTM_CLK (USB Device UTM Clk)
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GPIO49 - USB 2.0 Device UTM_DATA0
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GPIO50 - USB 2.0 Device UTM_DATA1
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GPIO51 - USB 2.0 Device UTM_DATA2
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GPIO52 - USB 2.0 Device UTM_DATA3
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GPIO53 - USB 2.0 Device UTM_DATA4
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GPIO54 - USB 2.0 Device UTM_DATA5
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GPIO55 - USB 2.0 Device UTM_DATA6
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GPIO56 - USB 2.0 Device UTM_DATA7
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GPIO58 - UTM_RXVALID (USB 2.0 Device)
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GPIO59 - UTM_RXACTIVE (USB 2.0 Device)
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GPIO60 - UTM_RXERROR
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GPIO61 - UTM_OPMODE0
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GPIO62 - UTM_OPMODE1
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GPIO71 - USBD_INT (USB Device?)
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GPIO73 - UTM_TXREADY (USB 2.0 Device)
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GPIO83 - UTM_TXVALID (USB 2.0 Device)
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GPIO98 - UTM_RESET (USB 2.0 device)
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GPIO99 - UTM_XCVR_SELECT
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GPIO100 - UTM_TERM_SELECT
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GPIO101 - UTM_SUSPENDM_X
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GPIO102 - UTM_LINESTATE0
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GPIO103 - UTM_LINESTATE1
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Card-Bus Interface - Leave unconfigured for now...
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------------------
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GPIO5 - nPIOR (I/O space output enable)
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GPIO6 - nPIOW (I/O space write enable)
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GPIO7 - nIOS16 (Input from I/O space telling size of data bus)
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GPIO8 - nPWAIT (Input for inserting wait states)
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LCD
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---
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GPIO6_2 - LDD0
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GPIO7_2 - LDD1
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GPIO8_2 - LDD2
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GPIO9_2 - LDD3
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GPIO11_2 - LDD5
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GPIO12_2 - LDD6
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GPIO13_2 - LDD7
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GPIO14_2 - VSYNC
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GPIO15_2 - HSYNC
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GPIO16_2 - VCLK
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GPIO17_2 - HCLK
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GPIO18_2 - VDEN
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GPIO63 - LDD8 (CPU LCD)
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GPIO64 - LDD9 (CPU LCD)
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GPIO65 - LDD10 (CPU LCD)
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GPIO66 - LDD11 (CPU LCD)
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GPIO67 - LDD12 (CPU LCD)
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GPIO68 - LDD13 (CPU LCD)
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GPIO69 - LDD14 (CPU LCD)
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GPIO70 - LDD15 (CPU LCD)
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GPIO88 - VCCLCD_PWREN (LCD Panel PWREN)
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GPIO97 - BACKLIGHT_EN
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GPIO104 - LCD_PWREN
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PWM - Leave unconfigured for now...
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---
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GPIO11 - PWM0
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GPIO12 - PWM1
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GPIO13 - PWM2
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GPIO14 - PWM3
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SD-CARD
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-------
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GPIO18 - SDDATA0
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GPIO19 - SDDATA1
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GPIO20 - SDDATA2
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GPIO21 - SDDATA3
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GPIO22 - SDCLK
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GPIO23 - SDCMD
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GPIO72 - SD_WP
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GPIO84 - SD_nIRQ_CD (SD-Card)
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I2C
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---
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GPIO32 - I2CSCL
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GPIO33 - I2CSDA
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AC97
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----
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GPIO35 - AC97_SDATA_IN
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GPIO37 - AC97_SDATA_OUT
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GPIO38 - AC97_SYNC
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GPIO39 - AC97_BITCLK
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GPIO40 - AC97_nRESET
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UART1
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-----
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GPIO41 - UART_RXD1
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GPIO42 - UART_TXD1
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GPIO43 - UART_CTS1
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GPIO44 - UART_DCD1
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GPIO45 - UART_DSR1
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GPIO46 - UART_nRI1
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GPIO47 - UART_DTR1
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GPIO48 - UART_RTS1
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UART2
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-----
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GPIO109 - RTS2
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GPIO110 - RXD2
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GPIO111 - TXD2
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GPIO112 - nCTS2
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UART3
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-----
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GPIO105 - nCTS3
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GPIO106 - nRTS3
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GPIO107 - TXD3
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GPIO108 - RXD3
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SSP3 - Leave unconfigured for now...
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----
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GPIO89 - SSP3_CLK
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GPIO90 - SSP3_SFRM
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GPIO91 - SSP3_TXD
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GPIO92 - SSP3_RXD
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SSP4
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GPIO93 - SSP4_CLK
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GPIO94 - SSP4_SFRM
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GPIO95 - SSP4_TXD
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GPIO96 - SSP4_RXD
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*/
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static mfp_cfg_t mfp_cfg[] __initdata = {
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/* USB */
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GPIO10_UTM_CLK,
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GPIO49_U2D_PHYDATA_0,
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GPIO50_U2D_PHYDATA_1,
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GPIO51_U2D_PHYDATA_2,
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GPIO52_U2D_PHYDATA_3,
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GPIO53_U2D_PHYDATA_4,
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GPIO54_U2D_PHYDATA_5,
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GPIO55_U2D_PHYDATA_6,
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GPIO56_U2D_PHYDATA_7,
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GPIO58_UTM_RXVALID,
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GPIO59_UTM_RXACTIVE,
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GPIO60_U2D_RXERROR,
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GPIO61_U2D_OPMODE0,
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GPIO62_U2D_OPMODE1,
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GPIO71_GPIO, /* USBD_INT */
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GPIO73_UTM_TXREADY,
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GPIO83_U2D_TXVALID,
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GPIO98_U2D_RESET,
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GPIO99_U2D_XCVR_SEL,
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GPIO100_U2D_TERM_SEL,
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GPIO101_U2D_SUSPEND,
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GPIO102_UTM_LINESTATE_0,
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GPIO103_UTM_LINESTATE_1,
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GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
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/* DM9000 */
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GPIO1_GPIO,
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GPIO9_GPIO,
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GPIO36_GPIO,
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/* AC97 */
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GPIO35_AC97_SDATA_IN_0,
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GPIO37_AC97_SDATA_OUT,
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GPIO38_AC97_SYNC,
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GPIO39_AC97_BITCLK,
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GPIO40_AC97_nACRESET,
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/* UARTS */
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GPIO41_UART1_RXD,
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GPIO42_UART1_TXD,
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GPIO43_UART1_CTS,
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GPIO44_UART1_DCD,
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GPIO45_UART1_DSR,
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GPIO46_UART1_RI,
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GPIO47_UART1_DTR,
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GPIO48_UART1_RTS,
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GPIO109_UART2_RTS,
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GPIO110_UART2_RXD,
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GPIO111_UART2_TXD,
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GPIO112_UART2_CTS,
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GPIO105_UART3_CTS,
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GPIO106_UART3_RTS,
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GPIO107_UART3_TXD,
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GPIO108_UART3_RXD,
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GPIO78_GPIO,
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GPIO79_GPIO,
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GPIO80_GPIO,
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GPIO81_GPIO,
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/* I2C */
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GPIO32_I2C_SCL,
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GPIO33_I2C_SDA,
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/* MMC */
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GPIO18_MMC1_DAT0,
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GPIO19_MMC1_DAT1,
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GPIO20_MMC1_DAT2,
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GPIO21_MMC1_DAT3,
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GPIO22_MMC1_CLK,
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GPIO23_MMC1_CMD,
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GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
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GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
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/* IRQ */
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GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
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GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
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GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
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GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
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GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
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GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
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GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
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GPIO81_GPIO | MFP_LPM_EDGE_RISE /* EXT_IRQ8 */
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};
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/* MMC/MCI Support */
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#if defined(CONFIG_MMC)
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static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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.detect_delay_ms = 10,
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.gpio_card_detect = MXM_8X10_SD_nCD,
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.gpio_card_ro = MXM_8X10_SD_WP,
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.gpio_power = -1
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};
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void __init mxm_8x10_mmc_init(void)
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{
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pxa_set_mci_info(&mxm_8x10_mci_platform_data);
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}
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#endif
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/* USB Open Host Controller Interface */
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static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
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.port_mode = PMM_NPS_MODE,
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.flags = ENABLE_PORT_ALL
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};
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void __init mxm_8x10_usb_host_init(void)
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{
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pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
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}
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/* AC97 Sound Support */
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static struct platform_device mxm_8x10_ac97_device = {
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.name = "pxa2xx-ac97"
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};
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void __init mxm_8x10_ac97_init(void)
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{
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platform_device_register(&mxm_8x10_ac97_device);
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}
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/* NAND flash Support */
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#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
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#define NAND_BLOCK_SIZE SZ_128K
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#define NB(x) (NAND_BLOCK_SIZE * (x))
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static struct mtd_partition mxm_8x10_nand_partitions[] = {
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[0] = {
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.name = "boot",
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.size = NB(0x002),
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.offset = NB(0x000),
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.mask_flags = MTD_WRITEABLE
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},
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[1] = {
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.name = "kernel",
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.size = NB(0x010),
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.offset = NB(0x002),
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.mask_flags = MTD_WRITEABLE
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},
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[2] = {
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.name = "root",
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.size = NB(0x36c),
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.offset = NB(0x012)
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},
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[3] = {
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.name = "bbt",
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.size = NB(0x082),
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.offset = NB(0x37e),
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.mask_flags = MTD_WRITEABLE
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}
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};
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static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
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.enable_arbiter = 1,
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.keep_config = 1,
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.num_cs = 1,
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.parts[0] = mxm_8x10_nand_partitions,
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.nr_parts[0] = ARRAY_SIZE(mxm_8x10_nand_partitions)
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};
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static void __init mxm_8x10_nand_init(void)
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{
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pxa3xx_set_nand_info(&mxm_8x10_nand_info);
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}
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#else
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static inline void mxm_8x10_nand_init(void) {}
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#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
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/* Ethernet support: Davicom DM9000 */
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static struct resource dm9k_resources[] = {
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[0] = {
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.start = MXM_8X10_ETH_PHYS + 0x300,
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.end = MXM_8X10_ETH_PHYS + 0x300,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = MXM_8X10_ETH_PHYS + 0x308,
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.end = MXM_8X10_ETH_PHYS + 0x308,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
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.end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
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}
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};
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static struct dm9000_plat_data dm9k_plat_data = {
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.flags = DM9000_PLATF_16BITONLY
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};
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static struct platform_device dm9k_device = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(dm9k_resources),
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.resource = dm9k_resources,
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.dev = {
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.platform_data = &dm9k_plat_data
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}
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};
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static void __init mxm_8x10_ethernet_init(void)
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{
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platform_device_register(&dm9k_device);
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}
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/* PXA UARTs */
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static void __init mxm_8x10_uarts_init(void)
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{
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pxa_set_ffuart_info(NULL);
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pxa_set_btuart_info(NULL);
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pxa_set_stuart_info(NULL);
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}
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/* I2C and Real Time Clock */
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static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
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{
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I2C_BOARD_INFO("ds1337", 0x68)
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}
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};
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static void __init mxm_8x10_i2c_init(void)
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{
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i2c_register_board_info(0, mxm_8x10_i2c_devices,
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ARRAY_SIZE(mxm_8x10_i2c_devices));
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pxa_set_i2c_info(NULL);
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}
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void __init mxm_8x10_barebones_init(void)
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{
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pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
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mxm_8x10_uarts_init();
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mxm_8x10_nand_init();
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mxm_8x10_i2c_init();
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mxm_8x10_ethernet_init();
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}
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