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This new header file is for NPS400 SoC (part of ARC architecture). The header file includes macros for save/restore of HW scheduling. The control of HW scheduling is achieved by writing core registers. This code was moved from arc/plat-eznps so it can be used from drivers/clocksource/, available only for CONFIG_EZNPS_MTM_EXT. Signed-off-by: Noam Camus <noamca@mellanox.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>