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58a85f465f
This patch adds DMA support for Freescale i.MX27 SoCs. It is derived from the i.MX1 port and should (though currently untested) still be working for the i.MX1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/*
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* linux/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
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*
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* i.MX DMA registration and IRQ dispatching
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*
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* Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
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* Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
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* Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <asm/dma.h>
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#ifndef __ASM_ARCH_MXC_DMA_H
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#define __ASM_ARCH_MXC_DMA_H
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#define IMX_DMA_CHANNELS 16
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#define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR)
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#define IMX_DMA_MEMSIZE_32 (0 << 4)
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#define IMX_DMA_MEMSIZE_8 (1 << 4)
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#define IMX_DMA_MEMSIZE_16 (2 << 4)
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#define IMX_DMA_TYPE_LINEAR (0 << 10)
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#define IMX_DMA_TYPE_2D (1 << 10)
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#define IMX_DMA_TYPE_FIFO (2 << 10)
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#define IMX_DMA_ERR_BURST (1 << 0)
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#define IMX_DMA_ERR_REQUEST (1 << 1)
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#define IMX_DMA_ERR_TRANSFER (1 << 2)
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#define IMX_DMA_ERR_BUFFER (1 << 3)
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#define IMX_DMA_ERR_TIMEOUT (1 << 4)
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int
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imx_dma_config_channel(int channel, unsigned int config_port,
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unsigned int config_mem, unsigned int dmareq, int hw_chaining);
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void
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imx_dma_config_burstlen(int channel, unsigned int burstlen);
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int
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imx_dma_setup_single(int channel, dma_addr_t dma_address,
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unsigned int dma_length, unsigned int dev_addr,
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dmamode_t dmamode);
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int
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imx_dma_setup_sg(int channel, struct scatterlist *sg,
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unsigned int sgcount, unsigned int dma_length,
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unsigned int dev_addr, dmamode_t dmamode);
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int
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imx_dma_setup_handlers(int channel,
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void (*irq_handler) (int, void *),
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void (*err_handler) (int, void *, int), void *data);
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int
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imx_dma_setup_progression_handler(int channel,
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void (*prog_handler) (int, void*, struct scatterlist*));
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void imx_dma_enable(int channel);
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void imx_dma_disable(int channel);
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int imx_dma_request(int channel, const char *name);
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void imx_dma_free(int channel);
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enum imx_dma_prio {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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};
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int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
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#endif /* _ASM_ARCH_MXC_DMA_H */
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