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29046f9b1e
1) Update copyright 2) Fix hardware queue descriptor field size CQ_ENET_RQ_DESC_FCOE_SOF_BITS 3) Include rtnetlink.h instead of if_link.h 4) Selectively flush writes to interrupt mask register 5) Use pci_enable_device_mem 6) Remove unused variables and header files 7) Fix size mismatch between memory alloc and free operations of a variable 8) Check for non null arguments to vic_provinfo_alloc Signed-off-by: Scott Feldman <scofeldm@cisco.com> Signed-off-by: Vasanthy Kolluri <vkolluri@cisco.com> Signed-off-by: Roopa Prabhu <roprabhu@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
55 lines
2.0 KiB
C
55 lines
2.0 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef _VNIC_ENIC_H_
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#define _VNIC_ENIC_H_
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/* Hardware intr coalesce timer is in units of 1.5us */
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#define INTR_COALESCE_USEC_TO_HW(usec) ((usec) * 2/3)
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#define INTR_COALESCE_HW_TO_USEC(usec) ((usec) * 3/2)
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/* Device-specific region: enet configuration */
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struct vnic_enet_config {
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u32 flags;
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u32 wq_desc_count;
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u32 rq_desc_count;
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u16 mtu;
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u16 intr_timer;
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u8 intr_timer_type;
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u8 intr_mode;
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char devname[16];
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u32 intr_timer_usec;
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u16 loop_tag;
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};
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#define VENETF_TSO 0x1 /* TSO enabled */
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#define VENETF_LRO 0x2 /* LRO enabled */
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#define VENETF_RXCSUM 0x4 /* RX csum enabled */
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#define VENETF_TXCSUM 0x8 /* TX csum enabled */
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#define VENETF_RSS 0x10 /* RSS enabled */
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#define VENETF_RSSHASH_IPV4 0x20 /* Hash on IPv4 fields */
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#define VENETF_RSSHASH_TCPIPV4 0x40 /* Hash on TCP + IPv4 fields */
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#define VENETF_RSSHASH_IPV6 0x80 /* Hash on IPv6 fields */
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#define VENETF_RSSHASH_TCPIPV6 0x100 /* Hash on TCP + IPv6 fields */
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#define VENETF_RSSHASH_IPV6_EX 0x200 /* Hash on IPv6 extended fields */
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#define VENETF_RSSHASH_TCPIPV6_EX 0x400 /* Hash on TCP + IPv6 ext. fields */
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#define VENETF_LOOP 0x800 /* Loopback enabled */
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#endif /* _VNIC_ENIC_H_ */
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