Magnus Damm 51da64264b sh: intc - add single bitmap register support ... This patch adds single bitmap register support to intc. The current code only handles 16 and 32 bit registers where a set bit means interrupt enabled, but this is easy to extend in the future. The INTC_IRQ() macro is also added to provide a way to hook in interrupt controllers for FPGAs in boards or companion chips. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2007-09-21 11:57:47 +09:00
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irq	sh: intc - add single bitmap register support	2007-09-21 11:57:47 +09:00
sh2	sh: IPR/INTC2 IRQ setup consolidation.	2007-07-20 12:18:20 +09:00
sh2a	sh: IPR/INTC2 IRQ setup consolidation.	2007-07-20 12:18:20 +09:00
sh3	sh: intc - remove redundant irq code for shmin	2007-09-21 11:57:47 +09:00
sh4	sh: intc - remove redundant irq code for sh03, snapgear and titan	2007-09-21 11:57:47 +09:00
sh4a	sh: Initial multiple-node support for SH-X3.	2007-09-21 11:57:47 +09:00
adc.c
clock.c	sh: Implement clk_round_rate() in the clock framework.	2007-07-20 13:29:09 +09:00
init.c	sh: Support explicit L1 cache disabling.	2007-09-21 11:57:46 +09:00
Makefile	sh: SH-MobileR SH7722 CPU support.	2006-12-12 08:42:09 +09:00
ubc.S	fix file specification in comments	2006-10-03 23:01:26 +02:00