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53d9cc7395
Patch from Tony Lindgren This patch adds the missing cache flushes to common low-level init that are needed to access the IO region. These flushes are normally done at the end of devicemaps_init(), but we need to detect the OMAP core type early. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
219 lines
5.3 KiB
C
219 lines
5.3 KiB
C
/*
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* linux/arch/arm/plat-omap/sram.c
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*
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* OMAP SRAM detection and management
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*
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* Copyright (C) 2005 Nokia Corporation
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/mach/map.h>
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#include <asm/tlb.h>
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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#include <asm/arch/sram.h>
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#define OMAP1_SRAM_PA 0x20000000
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#define OMAP1_SRAM_VA 0xd0000000
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#define OMAP2_SRAM_PA 0x40200000
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#define OMAP2_SRAM_VA 0xd0000000
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#define SRAM_BOOTLOADER_SZ 0x80
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static unsigned long omap_sram_base;
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static unsigned long omap_sram_size;
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static unsigned long omap_sram_ceil;
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/*
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* The amount of SRAM depends on the core type.
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* Note that we cannot try to test for SRAM here because writes
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* to secure SRAM will hang the system. Also the SRAM is not
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* yet mapped at this point.
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*/
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void __init omap_detect_sram(void)
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{
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if (!cpu_is_omap24xx())
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omap_sram_base = OMAP1_SRAM_VA;
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else
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omap_sram_base = OMAP2_SRAM_VA;
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if (cpu_is_omap730())
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omap_sram_size = 0x32000; /* 200K */
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else if (cpu_is_omap15xx())
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omap_sram_size = 0x30000; /* 192K */
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else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710())
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omap_sram_size = 0x4000; /* 16K */
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else if (cpu_is_omap1611())
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omap_sram_size = 0x3e800; /* 250K */
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else if (cpu_is_omap2420())
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omap_sram_size = 0xa0014; /* 640K */
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else {
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printk(KERN_ERR "Could not detect SRAM size\n");
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omap_sram_size = 0x4000;
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}
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omap_sram_ceil = omap_sram_base + omap_sram_size;
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}
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static struct map_desc omap_sram_io_desc[] __initdata = {
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{ /* .length gets filled in at runtime */
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.virtual = OMAP1_SRAM_VA,
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.pfn = __phys_to_pfn(OMAP1_SRAM_PA),
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.type = MT_DEVICE
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}
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};
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/*
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* In order to use last 2kB of SRAM on 1611b, we must round the size
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* up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
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* clock init needs SRAM early.
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*/
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void __init omap_map_sram(void)
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{
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if (omap_sram_size == 0)
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return;
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if (cpu_is_omap24xx()) {
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omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
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omap_sram_io_desc[0].pfn = __phys_to_pfn(OMAP2_SRAM_PA);
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}
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omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
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omap_sram_io_desc[0].length *= PAGE_SIZE;
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iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
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printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
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omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
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omap_sram_io_desc[0].length);
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/*
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* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but since we're called from map_io(), we
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* must do it here.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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/*
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* Looks like we need to preserve some bootloader code at the
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* beginning of SRAM for jumping to flash for reboot to work...
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*/
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memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
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omap_sram_size - SRAM_BOOTLOADER_SZ);
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}
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void * omap_sram_push(void * start, unsigned long size)
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{
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if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
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printk(KERN_ERR "Not enough space in SRAM\n");
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return NULL;
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}
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omap_sram_ceil -= size;
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omap_sram_ceil &= ~0x3;
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memcpy((void *)omap_sram_ceil, start, size);
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return (void *)omap_sram_ceil;
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}
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static void omap_sram_error(void)
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{
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panic("Uninitialized SRAM function\n");
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}
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#ifdef CONFIG_ARCH_OMAP1
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static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
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void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
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{
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if (!_omap_sram_reprogram_clock)
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omap_sram_error();
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return _omap_sram_reprogram_clock(dpllctl, ckctl);
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}
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int __init omap1_sram_init(void)
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{
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_omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
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sram_reprogram_clock_sz);
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return 0;
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}
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#else
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#define omap1_sram_init() do {} while (0)
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#endif
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#ifdef CONFIG_ARCH_OMAP2
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static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
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u32 base_cs, u32 force_unlock);
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void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
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u32 base_cs, u32 force_unlock)
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{
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if (!_omap2_sram_ddr_init)
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omap_sram_error();
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return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
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base_cs, force_unlock);
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}
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static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
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u32 mem_type);
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void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
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{
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if (!_omap2_sram_reprogram_sdrc)
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omap_sram_error();
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return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
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}
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static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
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u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
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{
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if (!_omap2_set_prcm)
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omap_sram_error();
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return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
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}
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int __init omap2_sram_init(void)
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{
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_omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
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_omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
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sram_reprogram_sdrc_sz);
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_omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
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return 0;
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}
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#else
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#define omap2_sram_init() do {} while (0)
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#endif
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int __init omap_sram_init(void)
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{
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omap_detect_sram();
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omap_map_sram();
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if (!cpu_is_omap24xx())
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omap1_sram_init();
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else
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omap2_sram_init();
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return 0;
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}
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