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1d2808fd3d
This flag only has meaning in old-EH drivers, and these drivers have already been converted to the new EH. Remove. Signed-off-by: Jeff Garzik <jeff@garzik.org>
295 lines
7.9 KiB
C
295 lines
7.9 KiB
C
/*
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* New ATA layer SC1200 driver Alan Cox <alan@redhat.com>
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*
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* TODO: Mode selection filtering
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* TODO: Can't enable second channel until ATA core has serialize
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* TODO: Needs custom DMA cleanup code
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*
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* Based very heavily on
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*
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* linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
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*
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* Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
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* May be copied or modified under the terms of the GNU General Public License
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*
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* Development of this chipset driver was funded
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* by the nice folks at National Semiconductor.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "sc1200"
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#define DRV_VERSION "0.2.5"
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#define SC1200_REV_A 0x00
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#define SC1200_REV_B1 0x01
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#define SC1200_REV_B3 0x02
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#define SC1200_REV_C1 0x03
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#define SC1200_REV_D1 0x04
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/**
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* sc1200_clock - PCI clock
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*
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* Return the PCI bus clocking for the SC1200 chipset configuration
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* in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
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*/
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static int sc1200_clock(void)
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{
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/* Magic registers that give us the chipset data */
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u8 chip_id = inb(0x903C);
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u8 silicon_rev = inb(0x903D);
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u16 pci_clock;
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if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
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return 0; /* 33 MHz mode */
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/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
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0/3 is 33Mhz 1 is 48 2 is 66 */
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pci_clock = inw(0x901E);
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pci_clock >>= 8;
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pci_clock &= 0x03;
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if (pci_clock == 3)
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pci_clock = 0;
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return pci_clock;
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}
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/**
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* sc1200_set_piomode - PIO setup
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* @ap: ATA interface
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* @adev: device on the interface
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*
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* Set our PIO requirements. This is fairly simple on the SC1200
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*/
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static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u32 pio_timings[4][5] = {
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{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
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{0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
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{0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
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{0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz
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};
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 format;
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unsigned int reg = 0x40 + 0x10 * ap->port_no;
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int mode = adev->pio_mode - XFER_PIO_0;
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pci_read_config_dword(pdev, reg + 4, &format);
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format >>= 31;
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format += sc1200_clock();
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pci_write_config_dword(pdev, reg + 8 * adev->devno,
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pio_timings[format][mode]);
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}
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/**
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* sc1200_set_dmamode - DMA timing setup
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* @ap: ATA interface
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* @adev: Device being configured
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*
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* We cannot mix MWDMA and UDMA without reloading timings each switch
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* master to slave.
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*/
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static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u32 udma_timing[3][3] = {
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{ 0x00921250, 0x00911140, 0x00911030 },
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{ 0x00932470, 0x00922260, 0x00922140 },
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{ 0x009436A1, 0x00933481, 0x00923261 }
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};
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static const u32 mwdma_timing[3][3] = {
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{ 0x00077771, 0x00012121, 0x00002020 },
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{ 0x000BBBB2, 0x00024241, 0x00013131 },
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{ 0x000FFFF3, 0x00035352, 0x00015151 }
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};
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int clock = sc1200_clock();
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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unsigned int reg = 0x40 + 0x10 * ap->port_no;
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int mode = adev->dma_mode;
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u32 format;
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if (mode >= XFER_UDMA_0)
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format = udma_timing[clock][mode - XFER_UDMA_0];
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else
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format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
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if (adev->devno == 0) {
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u32 timings;
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pci_read_config_dword(pdev, reg + 4, &timings);
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timings &= 0x80000000UL;
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timings |= format;
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pci_write_config_dword(pdev, reg + 4, timings);
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} else
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pci_write_config_dword(pdev, reg + 12, format);
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}
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/**
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* sc1200_qc_issue_prot - command issue
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* @qc: command pending
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*
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* Called when the libata layer is about to issue a command. We wrap
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* this interface so that we can load the correct ATA timings if
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* neccessary. Specifically we have a problem that there is only
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* one MWDMA/UDMA bit.
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*/
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static unsigned int sc1200_qc_issue_prot(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct ata_device *adev = qc->dev;
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struct ata_device *prev = ap->private_data;
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/* See if the DMA settings could be wrong */
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if (adev->dma_mode != 0 && adev != prev && prev != NULL) {
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/* Maybe, but do the channels match MWDMA/UDMA ? */
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if ((adev->dma_mode >= XFER_UDMA_0 && prev->dma_mode < XFER_UDMA_0) ||
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(adev->dma_mode < XFER_UDMA_0 && prev->dma_mode >= XFER_UDMA_0))
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/* Switch the mode bits */
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sc1200_set_dmamode(ap, adev);
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}
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return ata_qc_issue_prot(qc);
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}
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static struct scsi_host_template sc1200_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = LIBATA_MAX_PRD,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ATA_DMA_BOUNDARY,
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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};
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static struct ata_port_operations sc1200_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = sc1200_set_piomode,
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.set_dmamode = sc1200_set_dmamode,
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.mode_filter = ata_pci_default_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ata_cable_40wire,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = sc1200_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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.port_start = ata_port_start,
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};
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/**
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* sc1200_init_one - Initialise an SC1200
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* @dev: PCI device
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* @id: Entry in match table
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*
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* Just throw the needed data at the libata helper and it does all
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* our work.
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*/
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static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.sht = &sc1200_sht,
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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.udma_mask = 0x07,
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.port_ops = &sc1200_port_ops
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};
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/* Can't enable port 2 yet, see top comments */
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const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
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return ata_pci_init_one(dev, ppi);
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}
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static const struct pci_device_id sc1200[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
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{ },
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};
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static struct pci_driver sc1200_pci_driver = {
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.name = DRV_NAME,
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.id_table = sc1200,
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.probe = sc1200_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init sc1200_init(void)
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{
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return pci_register_driver(&sc1200_pci_driver);
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}
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static void __exit sc1200_exit(void)
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{
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pci_unregister_driver(&sc1200_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox, Mark Lord");
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MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, sc1200);
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MODULE_VERSION(DRV_VERSION);
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module_init(sc1200_init);
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module_exit(sc1200_exit);
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